ELECTRICAL WIRING DEVICE WITH PROTECTIVE FEATURES

• US 20120154972A1
• Filed: 12/17/2010
• Published: 06/21/2012
• Est. Priority Date: 12/17/2010
• Status: Active Grant

• Current Assignee: Pass & Seymour Incorporated (Legrand SA)
• Original Assignee: Pass & Seymour Incorporated (Legrand SA)
• Inventors: Morgan, Kent R., McMahon, Michael
• Granted Patent: US 8,861,146 B2
• Time in Patent Office: Days
• US Class Current: 361/187
• CPC Class Codes: G01R 31/55 Testing for incorrect line connections
• CPC Class Codes: H01H 1/0015 Means for testing or for inspecting contacts, e.g. wear indicator measuring circuits G01R31/3274
• CPC Class Codes: H01H 47/22 for supplying energising current for relay coil
• CPC Class Codes: H01H 83/04 with testing means for indicating the ability of the switch or relay to function properly
• CPC Class Codes: H02H 3/162 for ac systems
• CPC Class Codes: H02H 3/335 the main function being self testing of the device

Abstract

The present invention is directed to an electrical wiring device for use in an electrical distribution system. The device includes a plurality of line terminals configured to terminate the plurality of line conductors and a plurality of load terminals configured to terminate the plurality of load conductors. The protective circuit assembly includes at least one fault detector configured to generate a fault detection signal based on electrical perturbations propagating on at least one of the plurality of line terminals or at least one of the plurality of load terminals. A device integrity evaluation circuit includes a timing circuit coupled to the source of AC power by way of the plurality of load terminals and configured to generate a time measurement. The device integrity evaluation circuit is configured to reset the time measurement if the protective circuit assembly generates the fault detection signal during a predetermined test interval in the properly wired condition. The device integrity evaluation circuit is configured to generate a device integrity fault signal when the time measurement exceeds a predetermined threshold. A circuit interrupter assembly includes movable contacts configured to be latched into a reset state in response to a reset stimulus. The movable contacts are configured to be driven into a tripped state in response to the fault detection signal or the device integrity fault signal.

Claims

1. An electrical wiring device for use in an electrical distribution system including a plurality of line conductors coupled to a source of AC, power and a plurality of load conductors, comprising:

a plurality of line terminals configured to terminate the plurality of line conductors and a plurality of load terminals configured to terminate the plurality of load conductors, the electrical wiring device being in a properly wired condition when the plurality of line conductors are terminated to the plurality of line terminals and in a miswired condition when the plurality of line conductors are terminated to the plurality of load terminals;

a protective circuit assembly coupled to the plurality of line terminals or the plurality of load terminals, the protective circuit assembly including at least one fault detector configured to generate a fault detection signal based on electrical perturbations propagating on at least one of the plurality of line terminals or at least one of the plurality of load terminals;

a device integrity evaluation circuit coupled to the protective circuit assembly, the device integrity evaluation circuit including a timing circuit coupled to the source of AC, power by way of the plurality of load terminals and configured to generate a time measurement as a function of accumulated voltage, the device integrity evaluation circuit being configured to reset the time measurement if the protective circuit assembly generates the fault detection signal during a predetermined test interval in the properly wired condition, the device integrity evaluation circuit being configured to generate a device integrity fault signal when the time measurement exceeds a predetermined threshold; and

a circuit interrupter assembly coupled to the protective circuit assembly, the circuit interrupter assembly including movable contacts, the movable contacts being configured to be latched into a reset state in response to a reset stimulus, the movable contacts being configured to be driven into a tripped state in response to the fault detection signal or the device integrity fault signal.

2. The device of claim 1, wherein the protective circuit assembly includes at least one sensor coupled to the at least one fault detector, the at least one sensor providing a sensor output signal corresponding to electrical perturbations propagating on at least one of the plurality of line terminals or at least one of the plurality of load terminals, and wherein the at least one fault detector generates a fault detection signal based on the sensor output signal.

3. The device of claim 2, wherein the device integrity evaluation circuit further comprises:

a fault simulation circuit configured to generate a self-test signal that is sensed by the at least one sensor if the at least one sensor is operational; and

a monitor circuit coupled to the protective circuit assembly, the monitor circuit being configured to substantially inhibit the circuit interrupter assembly from tripping in response to the fault detection signal when the fault detection signal is generated in response to the self-test signal.

4. The device of claim 3, wherein the fault simulation circuit is configured to generate the self-test signal during a predetermined portion of an AC line cycle.

5. The device of claim 4, wherein the self-test signal is generated during a negative half cycle of the AC line cycle.

6. The device of claim 4, wherein the self-test signal is generated during portions of a positive half cycle of the AC line cycle and portions of a negative half cycle of the AC line cycle.

7. The device of claim 2, further comprising a power supply circuit coupled to the protective circuit assembly, the power supply being configured to inhibit the sensor output signal at or near a conclusion of the predetermined test interval.

8. The device of claim 7, wherein the device integrity evaluation circuit is configured to generate a self-test signal during portions of the predetermined test interval, the power supply being configured to inhibit the sensor output signal corresponding to the self-test signal outside of the predetermined test interval.

9. The device of claim 1, wherein the device integrity evaluation circuit is coupled to the source of AC power by way of the line terminals.

10. The device of claim 1, further comprising a wiring state detection circuit coupled between the line terminals and configured to conduct a predetermined current flow if the proper wiring condition has been effected.

11. The device of claim 10, wherein the predetermined current flow simulates a fault condition.

12. The device of claim 10, further comprising at least one circuit is configured to be open circuited after AC power is initially applied to the line terminals.

13. The device of claim 12, wherein the at least one circuit includes at least one switch element, the predetermined current flow being conducted if the at least one switch element is closed.

14. The device of claim 12, wherein the at least one circuit is opened after the predetermined current flow is conducted.

15. The device of claim 12, wherein the at least one switch element opens independently of the circuit interrupter assembly being tripped and closes independently of the circuit interrupter assembly being reset.

16. The device of claim 12, wherein the at least one switch element includes at least one contact coupled to a printed circuit board.

17. The device of claim 12, wherein the at least one circuit includes a circuit component that is open circuited in response to conduction of the predetermined current flow.

18. The device of claim 1, wherein the device integrity evaluation circuit is decoupled from the load terminals by way of at least one power isolation component when the circuit interrupting assembly is in the tripped state.

19. The device of claim 18, wherein the at least one power isolation component includes an auxiliary switching element, the auxiliary switching element being configured to decouple the at least one fault detector from one of the plurality of line terminals when the circuit interrupter assembly is in the tripped state.

20. The device of claim 18, wherein the at least one power isolation component is selected from a family of components that includes air gap structures, impedance devices, semi-conducting devices, or optical coupled devices.

21. The device of claim 18, wherein the at least one isolation device provides isolation selectively when the circuit interrupter is in the tripped state or the reset state.

22. The device of claim 21, wherein a trip indicator is coupled to the at least one isolation device.

23. The device of claim 1, further comprising a wiring state detection circuit assembly, the assembly comprising:

a first circuit coupled between the plurality of line terminals and configured to provide a predetermined response in the properly wired condition, the circuit being substantially disabled after the occurrence of the predetermined response; and

a second circuit coupled between the plurality of load terminals, the second circuit being configured to provide power to the device integrity evaluation circuit from the load terminals when the device is in the miswired condition.

24. The device of claim 23, wherein the protective circuit assembly is configured to generate the fault detection signal in response to the predetermined response.

25. The device of claim 1, wherein the device integrity evaluation circuit further comprises:

an accumulation circuit configured to derive power from the plurality of line terminals in the properly wired condition or from the load terminals in the miswired condition, the accumulation circuit being configured to generate the accumulated voltage as a function of the time measurement, the accumulated voltage being substantially reduced to zero in response to the fault detection signal;

an actuator assembly coupled to the circuit interrupter assembly, the actuator assembly being configured to generate the device integrity fault signal when the voltage exceeds a predetermined threshold.

26. The device of claim 1, further comprising an indicator circuit including at least one indicator, and wherein the fault detector further includes an SCR that generates an output signal, the indicator circuit being configured to activate the at least one indicator when the SCR fails to generate the output signal within a predetermined period of time.

27. The device of claim 26, wherein the indicator emits a flashing indication or a beeping indication when activated by the indicator circuit.

28. The device of claim 1, wherein the device integrity evaluation circuit further comprises an accumulation circuit configured to generate a voltage as a function of the time measurement, the voltage being substantially reduced to zero in response to the fault detection signal.

29. The device of claim 28, further comprising an indicator circuit including at least one indicator, the indicator circuit being configured to activate the at least one indicator when the voltage is greater than a predetermined threshold.

30. The device of claim 29, wherein the indicator emits a flashing indication or a beeping indication when activated by the indicator circuit.

31. The device of claim 1, wherein the circuit interrupter assembly includes a first solenoid and a second solenoid, the circuit interrupter assembly being driven into the tripped state by either the first solenoid or the second solenoid.

32. The device of claim 31, wherein the first solenoid and the second solenoid are separated by an insulative barrier.

33. The device of claim 32, wherein the first solenoid and the second solenoid are connected to a plurality of termination pins partially disposed in the insulative barrier.

34. The device of claim 31, wherein the first solenoid and the second solenoid are connected together by way of two termination pins.

35. The device of claim 1, wherein the protective circuit assembly is configured to receive power from the plurality of line terminals.

36. The device of claim 1, wherein the movable contacts include four sets of movable contacts coupled to a latch mechanism.

37. The device of claim 36, wherein the four sets of movable contacts are configured to establish electrical continuity between the plurality of line terminals, the plurality of load terminals and a plurality of receptacle terminals in the reset state, and interrupt electrical continuity between the plurality of line terminals, the plurality of load terminals and the plurality of receptacle terminals in the tripped state.

38. The device of claim 37, wherein the wherein the four sets of movable contacts include two sets of movable neutral contacts and two sets of movable hot contacts.

39. The device of claim 38, wherein the two sets of movable neutral contacts include a neutral line contact, a neutral load contact and a neutral receptacle terminal contact, and wherein the two sets of movable hot contacts include a hot line contact, a hot load contact and a hot receptacle terminal contact.

40. The device of claim 36, further comprising at least one auxiliary switch coupled to the latch mechanism.

41. The device of claim 40, wherein the circuit interrupter assembly includes at least one solenoid coupled to the protective circuit assembly and responsive to the fault detection signal or the device integrity fault signal, the at least one auxiliary switch is configured to decouple the at least one solenoid from the protective circuit in the tripped state.

42. The device of claim 40, wherein the at least one auxiliary switch is configured to isolate at least a portion of the device integrity evaluation circuit from the protective circuit assembly in the tripped state.