WIRELESS POWER RECEIVER CIRCUITRY

• US 20120155136A1
• Filed: 09/30/2011
• Published: 06/21/2012
• Est. Priority Date: 12/16/2010
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Von Novak, William H., Irish, Linda S.
• Granted Patent: US 9,337,664 B2
• Time in Patent Office: Days
• US Class Current: 363/126
• CPC Class Codes: H02J 50/12 of the resonant type
• CPC Class Codes: H02J 50/20 using microwaves or radio frequency waves
• CPC Class Codes: H02J 50/80 involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
• CPC Class Codes: H02J 7/00712 the cycle being controlled or terminated in response to electric parameters
• CPC Class Codes: H02M 3/1582 Buck-boost converters H02M3/1584 takes precedence

Abstract

Exemplary embodiments are directed to wireless power receivers. A device may include a power converter configured to receive an input voltage. The device may further include circuitry configured to limit a pulse width modulation duty cycle of the power converter to prevent the input voltage from dropping below a threshold voltage.

Claims

1. A device, comprising:

a power converter configured to receive an input voltage; and

circuitry configured to limit a pulse width modulation duty cycle of the power converter to prevent the input voltage from dropping below a threshold voltage.

2. The device of claim 1, the circuitry further configured to limit an amount of power at an output of the device to prevent the input voltage from dropping below the threshold voltage.

3. The device of claim 1, the circuitry comprising:

a resistor coupled between an input for receiving the input voltage and a node; and

a zener diode coupled between the node and a ground voltage, the node coupled to an input of the power converter.

4. The device of claim 3, the power converter configured to receive a variable current at the input thereof dependent on the input voltage.

5. The device of claim 1, the circuitry comprising:

a zener diode having a first end coupled to an input for receiving the input voltage; and

a current mirror having a first transistor coupled to each of a second end of the zener diode and a ground voltage and another transistor coupled to each of a feedback voltage of the power converter via a resistor and the ground voltage.

6. The device of claim 5, a current through the zener diode and a current through the resistor dependent on the input voltage.

7. The device of claim 1, the power converter comprising the circuitry.

8. The device of claim 7, the circuitry comprising:

a diode having a first end coupled to an output of an error amplifier and an input of a pulse width modulation generator; and

a reference voltage coupled between a second end of the diode and a ground voltage.

9. The device of claim 1, the power converter comprising a DC-to-DC converter.

10. A device, comprising:

a power converter configured to receive an input voltage; and

circuitry configured to limit an amount of power conveyed at an output to prevent the input voltage from dropping below a threshold value.

11. The device of claim 10, the circuitry comprising:

a resistor coupled to an input for receiving the input voltage; and

a zener diode coupled between the resistor and a ground voltage, the power converter coupled to a node between the resistor and the zener diode and configured to receive a variable current via the node dependent on the input voltage

12. The device of claim 10, the circuitry comprising:

a zener diode coupled to an input for receiving the input voltage;

a current mirror having one path coupled to the zener diode; and

a pulldown resistor between a second path of the current mirror and a feedback voltage input of the power converter.

13. The device of claim 12, a current through the first path of the current mirror and a current through the second path of the current mirror being dependent on the input voltage.

14. The device of claim 10, the circuitry integrated within the power converter and comprising:

a diode coupled between an output of an error amplifier and an input of a pulse width modulation generator; and

a reference voltage coupled between the diode and a ground voltage.

15. A method, comprising:

receiving an input voltage at a power converter; and

limiting a pulse width modulation duty cycle of the power converter to maintain the input voltage above a threshold voltage.

16. The method of claim 15, the receiving an input voltage comprising receiving the input voltage from a rectifier.

17. The method of claim 15, the limiting a pulse width modulation duty cycle comprising limiting a current conveyed to the power converter.

18. The method of claim 15, the limiting a pulse width modulation duty cycle comprising increasing a voltage at a feedback voltage input of the power converter.

19. The method of claim 15, the limiting a pulse width modulation duty cycle comprising limiting a voltage conveyed to a pulse width modulation generator.

20. A method, comprising:

receiving an input voltage at a power converter; and

decreasing an amount of power conveyed at an output of the power converter to prevent the input voltage from dropping below a threshold value.

21. The method of claim 20, the receiving an input voltage comprising receiving the input voltage conveyed from a rectifier at a DC-to-DC converter.

22. The method of claim 20, the decreasing an amount of power conveyed at an output of the power converter comprising limiting a current conveyed to the power converter.

23. The method of claim 20, the decreasing an amount of power conveyed at an output of the power converter comprising increasing a voltage at a feedback voltage input of the power converter.

24. A device, comprising:

means for receiving an input voltage at a power converter; and

means for limiting a pulse width modulation duty cycle of the power converter to maintain the input voltage above a threshold voltage.

25. A device, comprising:

means for receiving an input voltage at a power converter; and

means for decreasing an amount of power conveyed at an output of the power converter to prevent the input voltage from dropping below a threshold value.