SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CONTROL SYSTEM INCLUDING THE SAME

• US 20120157015A1
• Filed: 03/15/2011
• Published: 06/21/2012
• Est. Priority Date: 12/21/2010
• Status: Abandoned Application

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: CHOI, Jun-Gi, CHO, Jeong-Ho, CHO, Hyung-Jun
• Application Number:
  US13/048,283
• Publication Number:
  US 20120157015A1
• Time in Patent Office: Days
• US Class Current: 455/90.2
• CPC Class Codes: H01Q 23/00 Antennas with active circuits or circuit elements integrated within them or attached to them
• CPC Class Codes: H01Q 7/00 Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
• CPC Class Codes: H04B 1/40 Circuits

Abstract

A semiconductor device includes an interface pad, and an antenna formed to surround the interface pad. The semiconductor device may further include a buffer configured to receive a first input signal applied to the interface pad, a driver configured to output a first output signal to the interface pad a receiver configured to receive a second input signal transferred to the antenna, and a transmitter configured to output a second output signal to the antenna.

Claims

1. A semiconductor device comprising:

an interface pad; and

an antenna formed to surround the interface pad.

2. The semiconductor device of claim 1, wherein the antenna has a spiral shape.

3. The semiconductor device of claim 1, wherein the semiconductor device is configured to communicate with a first external device through the interface pad during a wired operation mode, and the semiconductor device is further configured to communicate with a second external device wirelessly through the antenna during a wireless operation mode.

4. The semiconductor device of claim 3, wherein the interface pad is coupled with the first external device through cables.

5. The semiconductor device of claim 3, further comprising:

a buffer configured to receive a first input signal applied to the interface pad;

a driver configured to output a first output signal to the interface pad;

a receiver configured to receive a second input signal transferred to the antenna; and

a transmitter configured to output a second output signal to the antenna.

6. The semiconductor device of claim 5, further comprising:

a controller configured to control the receiver and the transmitter to be linked with an internal bus during the wireless operation mode and control the buffer and the driver to be linked with the internal bus during the wired operation mode.

7. The semiconductor device of claim 6, wherein the first and second input signals include commands, addresses, or data, and the first and second output signals include data.

8. The semiconductor device of claim 5, wherein a first end of the antenna is coupled with the transmitter and the receiver through a metal line of a first layer and a second end of the antenna is coupled with the transmitter and the receiver through a metal line of a second layer which is different from the first layer.

9. The semiconductor device of claim 8, wherein the interface pad is coupled with the buffer and the driver through the metal line of the second layer.

10. The semiconductor device of claim 3, wherein the wireless operation mode is an operation mode used for testing the semiconductor device and the wired operation mode is an operation mode used for a normal operation of the semiconductor device.

11. A semiconductor control system comprising:

a semiconductor device comprising an interface pad and a first antenna surrounding the interface pad; and

a semiconductor control device comprising a second antenna and configured to communicate with the semiconductor device through the first and second antennas during a first operation mode.

12. The semiconductor control system of claim 11, wherein the first antenna has a spiral shape.

13. The semiconductor control system of claim 11, wherein the semiconductor device further comprises:

a buffer configured to receive a first input signal applied to the interface pad;

a driver configured to output a first output signal to the interface pad;

a first receiver configured to receive a second input signal transferred to the first antenna; and

a first transmitter configured to output a second output signal to the first antenna.

14. The semiconductor control system of claim 13, wherein the semiconductor device further comprises:

a controller configured to control the first receiver and the first transmitter to be linked with an internal bus during the first operation mode and control the buffer and the driver to be linked with the internal bus during a second operation mode.

15. The semiconductor control system of claim 14, wherein the first operation mode includes a wireless operation mode used for testing the semiconductor device, the second operation mode includes a wired operation mode used for a normal operation of the semiconductor device, and the semiconductor control device includes a testing device used for testing the semiconductor device.

16. The semiconductor control system of claim 13, wherein the semiconductor control device further comprises:

a second receiver configured to receive a third input signal transferred to the second antenna; and

a second transmitter configured to output a third output signal to the second antenna.

17. The semiconductor control system of claim 13, wherein a first end of the first antenna is coupled with the first transmitter and the first receiver through a metal line of a first layer, and a second end of the first antenna is coupled with the first transmitter and the first receiver through a metal line of a second layer which is different from the first layer.

18. The semiconductor control system of claim 17, wherein the interface pad is coupled with the buffer and the driver through the metal line of the second layer.

19. The semiconductor device of claim 11, wherein the semiconductor control device is configured to test an operation of the semiconductor device in the first operation mode by wirelessly exchanging commands, addresses, or data with the semiconductor device through the first and second antennas.