SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20120161122A1
• Filed: 12/20/2011
• Published: 06/28/2012
• Est. Priority Date: 12/28/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei
• Granted Patent: US 9,911,858 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A miniaturized semiconductor device including a transistor in which a channel formation region is formed using an oxide semiconductor film and variation in electric characteristics due to a short-channel effect is suppressed is provided. In addition, a semiconductor device whose on-state current is improved is provided. A semiconductor device is provided with an oxide semiconductor film including a pair of second oxide semiconductor regions which are amorphous regions and a first oxide semiconductor region located between the pair of second oxide semiconductor regions, a gate insulating film, and a gate electrode provided over the first oxide semiconductor region with the gate insulating film interposed therebetween. One or more kinds of elements selected from Group 15 elements such as nitrogen, phosphorus, and arsenic are added to the second oxide semiconductor regions.

Claims

1. A semiconductor device comprising:

a substrate;

an oxide semiconductor film comprising a first oxide semiconductor region and a pair of second oxide semiconductor regions over the substrate;

a gate insulating film over the oxide semiconductor film; and

a gate electrode over the first oxide semiconductor region with the gate insulating film therebetween,

wherein the first oxide semiconductor region is located between the pair of second oxide semiconductor regions,

wherein each of the pair of second oxide semiconductor regions is an amorphous region, and

wherein the first oxide semiconductor region comprises a crystalline region comprising c-axis alignment.

2. The semiconductor device according to claim 1,

wherein the pair of second oxide semiconductor regions serve as a source region and a drain region, and

wherein the first oxide semiconductor region serves as a channel region.

3. The semiconductor device according to claim 1, wherein the oxide semiconductor film comprises at least two kinds of elements selected from In, Ga, Sn, and Zn.

4. The semiconductor device according to claim 1, wherein each of the pair of second oxide semiconductor regions comprises at least one kind of element selected from nitrogen, phosphorus, and arsenic.

5. The semiconductor device according to claim 4, wherein a concentration of the element in the pair of second oxide semiconductor regions is higher than or equal to 5×

10¹⁸ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³.

6. The semiconductor device according to claim 1, wherein the gate electrode overlaps with only the first oxide semiconductor region.

7. The semiconductor device according to claim 1, further comprising:

a source electrode and a drain electrode between the oxide semiconductor film and the substrate, the source electrode and the drain electrode being electrically connected to the pair of second oxide semiconductor regions.

8. A semiconductor device comprising:

a substrate;

a gate electrode over the substrate;

a gate insulating film over the gate electrode; and

an oxide semiconductor film comprising a first oxide semiconductor region and a pair of second oxide semiconductor regions over the gate insulating film;

wherein the first oxide semiconductor region is located between the pair of second oxide semiconductor regions,

wherein each of the pair of second oxide semiconductor regions is an amorphous region, and

wherein the first oxide semiconductor region comprises a crystalline region comprising c-axis alignment.

9. The semiconductor device according to claim 8,

wherein the pair of second oxide semiconductor regions serve as a source region and a drain region, and

wherein the first oxide semiconductor region serves as a channel region.

10. The semiconductor device according to claim 8, wherein the oxide semiconductor film comprises at least two kinds of elements selected from In, Ga, Sn, and Zn.

11. The semiconductor device according to claim 8, wherein each of the pair of second oxide semiconductor regions comprises at least one kind of element selected from nitrogen, phosphorus, and arsenic.

12. The semiconductor device according to claim 11, wherein a concentration of the element in the pair of second oxide semiconductor regions is higher than or equal to 5×

10¹⁸ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³.

13. The semiconductor device according to claim 8, further comprising:

a source electrode and a drain electrode over the pair of second oxide semiconductor regions, the source electrode and the drain electrode being electrically connected to the pair of second oxide semiconductor regions, and

an insulating film over and in contact with the first oxide semiconductor region, the insulating film overlapping with the gate electrode.

14. The semiconductor device according to claim 13, wherein the insulating film overlaps with only the first oxide semiconductor region.

15. A method for manufacturing a semiconductor device, comprising the steps of:

forming an oxide semiconductor film over an insulating surface;

performing heat treatment so that the oxide semiconductor film comprises a crystalline region comprising c-axis alignment;

forming a gate insulating film over the oxide semiconductor film;

forming a gate electrode over the gate insulating film; and

forming a first oxide semiconductor region and a pair of second oxide semiconductor regions, wherein the pair of second oxide semiconductor regions are formed by adding an ion to the oxide semiconductor film with the gate electrode as a mask,

wherein each of the pair of second oxide semiconductor regions is an amorphous region.

16. The method for manufacturing the semiconductor device according to claim 15,

wherein the pair of second oxide semiconductor regions serve as a source region and a drain region, and

wherein the first oxide semiconductor region serves as a channel region.

17. The method for manufacturing the semiconductor device according to claim 15, wherein the oxide semiconductor film comprises at least two kinds of elements selected from In, Ga, Sn, and Zn.

18. The method for manufacturing the semiconductor device according to claim 15, wherein the ion is at least one kind of element selected from nitrogen, phosphorus, and arsenic.

19. The method for manufacturing the semiconductor device according to claim 18, wherein a concentration of the element in the pair of second oxide semiconductor regions is higher than or equal to 5×

10¹⁸ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³.

20. The method for manufacturing the semiconductor device according to claim 15, wherein the gate electrode overlaps with only the first oxide semiconductor region.

21. The method for manufacturing the semiconductor device according to claim 15, further comprising the step of:

forming a source electrode and a drain electrode over the insulating surface before forming the oxide semiconductor film,

wherein the oxide semiconductor film is formed over the insulating surface, and the source electrode and the drain electrode.

22. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode over an insulating surface;

forming a gate insulating film over the gate electrode;

forming an oxide semiconductor film over the gate insulating film;

performing heat treatment so that the oxide semiconductor film comprises a crystalline region comprising c-axis alignment;

forming a first insulating film over the oxide semiconductor film;

patterning the first insulating film to form a second insulating film overlapping with the gate electrode; and

forming a first oxide semiconductor region and a pair of second oxide semiconductor regions, wherein the pair of second oxide semiconductor regions are formed by adding an ion to the oxide semiconductor film with the second insulating film as a mask,

wherein each of the pair of second oxide semiconductor regions is an amorphous region, and

wherein an end portion of the second insulating film is provided on an inner side than an end portion of the gate electrode.

23. The method for manufacturing the semiconductor device according to claim 22,

wherein the pair of second oxide semiconductor regions serve as a source region and a drain region, and

wherein the first oxide semiconductor region serves as a channel region.

24. The method for manufacturing the semiconductor device according to claim 22, wherein the oxide semiconductor film comprises at least two kinds of elements selected from In, Ga, Sn, and Zn.

25. The method for manufacturing the semiconductor device according to claim 22, wherein the ion is at least one kind of element selected from nitrogen, phosphorus, and arsenic.

26. The method for manufacturing the semiconductor device according to claim 25, wherein a concentration of the element in the pair of second oxide semiconductor regions is higher than or equal to 5×

10¹⁸ atoms/cm³ and lower than or equal to 1×

10²² atoms/cm³.

27. The method for manufacturing the semiconductor device according to claim 22, wherein the second insulating film overlaps with only the first oxide semiconductor region.

28. The method for manufacturing the semiconductor device according to claim 22, further comprising the step of:

forming a source electrode and a drain electrode over the pair of second oxide semiconductor regions.