INTEGRATED MOSFET DEVICES WITH SCHOTTKY DIODES AND ASSOCIATED METHODS OF MANUFACTURING

• US 20120161225A1
• Filed: 12/28/2010
• Published: 06/28/2012
• Est. Priority Date: 12/28/2010
• Status: Active Grant

• Current Assignee: Monolithic Power Systems Incorporated
• Original Assignee: Monolithic Power Systems Incorporated
• Inventors: Li, Tiesheng, Zhang, Lei
• Granted Patent: US 8,735,968 B2
• Time in Patent Office: Days
• US Class Current: 257/328
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

The present technology discloses a semiconductor die integrating a MOSFET device and a Schottky diode. The semiconductor die comprises a MOSFET area comprising the active region of MOSFET, a Schottky diode area comprising the active region of Schottky diode, and a termination area comprising termination structures. Wherein the Schottky diode area is placed between the MOSFET area and the termination area such that the Schottky diode area surrounds the MOSFET area.

Claims

1. A semiconductor die having a MOSFET and a Schottky diode, the semiconductor die comprising:

a substrate;

a MOSFET area in the substrate, the MOSFET area containing an active region of the MOSFET;

a Schottky diode area in the substrate, the Schottky diode area containing an active region of the Schottky diode;

a termination area in the substrate, the termination area comprising a plurality of termination structures; and

wherein the Schottky diode area is laterally between the MOSFET area and the termination area.

2. The semiconductor die of claim 1, wherein:

the Schottky diode has an anode and a cathode;

the MOSFET has a source and a drain;

the anode of the Schottky diode is coupled to the source of the MOSFET; and

the cathode of the Schottky diode is coupled to the drain of the MOSFET.

3. The semiconductor die of claim 1, wherein the Schottky diode area substantially surrounds the MOSFET area.

4. The semiconductor die of claim 1 further comprising:

a source metal placed over the MOSFET area and the Schottky diode area; and

a plurality of doped rings having a different doping type from the substrate, wherein the plurality of doped rings are integrated into the substrate and are located laterally within the Schottky diode area, and wherein the doped rings surround the MOSFET area.

5. The semiconductor die of claim 4, wherein the doped rings are at a periphery of the source metal.

6. The semiconductor die of claim 4, wherein the source metal electrically couples to a source of the MOSFET, to the anode of the Schottky diode, and to the plurality of doped rings.

7. The semiconductor die of claim 4, wherein the plurality of doped rings are located beneath the source metal.

8. The semiconductor die of claim 1, wherein the MOSFET is a trench gate MOSFET.

9. A semiconductor device having a bottom side and an opposing top side, the semiconductor device comprising:

a substrate proximate the bottom side of the semiconductor device, wherein the substrate is doped with a first doping type;

an epitaxial layer above the substrate, wherein the epitaxial layer is doped with the first doping type;

a MOSFET having a body region, a source region, a drain region, and a gate, wherein the body region and the source region are located in the epitaxial layer;

a plurality of doped rings with a second doping type, wherein the plurality of doped rings are in the epitaxial layer, and wherein the doped rings surround the MOSFET;

a plurality of Schottky contacts between the adjacent doped rings; and

a source metal over the MOSFET and the Schottky contacts.

10. The semiconductor device of claim 9, wherein the source metal electrically couples to and shorts the source region, the Schottky contacts, and the plurality of doped rings.

11. The semiconductor device of claim 9, further comprising a gate metal, wherein the gate metal is placed outside of the plurality of doped rings.

12. The semiconductor device of claim 11, wherein the plurality of doped rings and the gate metal are surrounded by a plurality of termination structures.

13. The semiconductor device of claim 9, wherein the first doping type is N-type and the second doping type is P-type.

14. A method of integrating a MOSFET and a Schottky diode into a semiconductor die, comprising:

integrating an NMOS device onto a semiconductor substrate;

integrating a plurality of P-type rings onto the semiconductor substrate, wherein the plurality of P-type rings are surrounding the NMOS device; and

integrating a Schottky diode onto the semiconductor substrate among the plurality of P-type rings.

15. The method of claim 14 further comprising placing a source metal above the NMOS device and the Schottky diode to electrically couple the source of NMOS, the anode of Schottky diode and the plurality P-type rings together.