LOW DROP OUT VOLTAGE REGULATO

• US 20120161734A1
• Filed: 12/23/2010
• Published: 06/28/2012
• Est. Priority Date: 12/23/2010
• Status: Active Grant

• Current Assignee: Winbond Electronics Corporation
• Original Assignee: Winbond Electronics Corporation
• Inventors: Wu, Chen-Yu
• Granted Patent: US 8,471,539 B2
• Time in Patent Office: Days
• US Class Current: 323/282
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit

Abstract

A low drop out (LDO) voltage regulator having an error amplifier, a power transistor, a first voltage division unit, a compensation control unit and a compensation bias current source is provided. The error amplifier generates a control voltage according to a first reference voltage and a feedback voltage. The power transistor generates an output voltage at a drain of the power transistor according to the control voltage. The first voltage division unit divides the output voltage to generate the feedback voltage. The compensation control unit generates a compensation control signal to the compensation bias current source according to the control voltage, the output voltage and a compensation bias, so as to make the compensation bias current source generate a compensation bias current, in which the compensation bias is inversely proportional to a supply voltage and ambient temperature.

Claims

1. A low drop out (LDO) voltage regulator, comprising:

an error amplifier, for generating a control voltage according to a first reference voltage and a feedback voltage;

a power transistor, comprising a gate coupled to the error amplifier and a source coupled to a supply voltage, for generating an output voltage at a drain of the power transistor according to the control voltage;

a first voltage division unit, coupled between the drain of the power transistor and a ground, for dividing the output voltage to generate the feedback voltage;

a compensation control unit, coupled between the gate and the drain of the power transistor, for generating a compensation control signal according to the control voltage, the output voltage, and a compensation bias, wherein the compensation bias is inversely proportional to the supply voltage and ambient temperature; and

a compensation bias current source, coupled to the error amplifier, for supplying a compensation bias current to the LDO voltage regulator according to the compensation control signal.

2. The LDO voltage regulator according to claim 1, further comprising:

a voltage and temperature compensation module, coupled to the compensation control unit, for generating the compensation bias, and regulating the compensation bias according to changes of the supply voltage and the ambient temperature.

3. The LDO voltage regulator according to claim 1, further comprising:

a bias current source, coupled to the error amplifier, for supplying a bias current to the error amplifier.

4. The LDO voltage regulator according to claim 1, wherein the first voltage division unit comprises:

a first resistor; and

a second resistor, serially connected to the first resistor between the drain of the power transistor and the ground, for generating the feedback voltage at a common node of the first resistor and the second resistor.

5. The LDO voltage regulator according to claim 1, wherein the compensation control unit comprises:

a first drop out detection unit, coupled to the gate of the power transistor, for detecting the control voltage, and outputting a first compensation signal according to changes of a voltage level of the control voltage;

a second drop out detection unit, coupled to the drain of the power transistor, for detecting the output voltage, and outputting a second compensation signal according to changes of a voltage level of the output voltage and the compensation bias; and

a compensation control signal generating unit, coupled to the first drop out detection unit and the second drop out detection unit, for outputting the compensation control signal according to the first compensation signal and the second compensation signal.

6. The LDO voltage regulator according to claim 5, wherein the compensation control signal generating unit comprises:

a first P-type transistor, comprising a gate coupled to the second drop out detection unit, and a source and a drain respectively coupled to the supply voltage and the bias current source; and

a first N-type transistor, comprising a gate coupled to the first drop out detection unit, and a drain and a source respectively coupled to the drain of the first P-type transistor and the ground.

7. The LDO voltage regulator according to claim 6, wherein the first drop out detection unit comprises:

a second P-type transistor, comprising a gate coupled to the gate of the power transistor, and a source coupled to the supply voltage;

a second N-type transistor, comprising a gate and a source coupled to each other, wherein a drain and the source of the second N-type transistor are respectively coupled to the drain of the second P-type transistor and the ground;

a third P-type transistor, comprising a gate and a drain coupled to each other, wherein a source and the drain of the third P-type transistor are respectively coupled to the supply voltage and the gate of the first N-type transistor; and

a third N-type transistor, comprising a gate coupled to the gate of the second N-type transistor, and a drain and a source respectively coupled to the drain of the third P-type transistor and the ground.

8. The LDO voltage regulator according to claim 6, wherein the second drop out detection unit comprises:

a fourth P-type transistor, comprising a gate coupled to the gate of the first P-type transistor, a source coupled to the output voltage, and a drain coupled to the gate of the fourth P-type transistor; and

a fourth N-type transistor, comprising a gate coupled to the compensation bias, and a drain and a source respectively coupled to the drain of the fourth P-type transistor and the ground.

9. The LDO voltage regulator according to claim 1, wherein the compensation bias current source comprises:

a fifth N-type transistor, comprising a gate coupled to the compensation control unit, and a drain and a source respectively coupled to the error amplifier and the ground.

10. The LDO voltage regulator according to claim 9, wherein when the LDO voltage regulator is operated at a low load, a gate bias of the fifth N-type transistor is slightly lower than a conduction voltage of the fifth N-type transistor.

11. The LDO voltage regulator according to claim 1, wherein the voltage and temperature compensation module comprises:

an energy gap reference voltage generating unit, for generating a second reference voltage and a third reference voltage;

a voltage compensation unit, for outputting a voltage compensation control signal according to the changes of the supply voltage; and

a temperature compensation unit, coupled to the energy gap reference voltage generating unit and the voltage compensation unit, for performing temperature compensation and voltage compensation according to the second reference voltage, the third reference voltage, and the voltage compensation control signal, so as to output the compensation bias.

12. The LDO voltage regulator according to claim 11, wherein the voltage compensation unit comprises:

a second voltage division unit, for dividing the supply voltage to output a divided voltage;

a plurality of comparison units, coupled to the second voltage division unit, for comparing the divided voltage with a plurality of fourth reference voltages respectively; and

an interpretation unit, for interpreting comparison results of the comparison units to output the voltage compensation control signal.

13. The LDO voltage regulator according to claim 11, wherein the temperature compensation unit comprises:

a first compensation transistor, comprising a gate coupled to the second reference voltage and a source coupled to the supply voltage, for outputting a positive temperature compensation current at a drain;

a second compensation transistor, comprising a gate coupled to the third reference voltage and a source coupled to the supply voltage, for outputting a negative temperature compensation current at a drain;

a current proportion regulation unit, coupled to the first compensation transistor, the second compensation transistor, and the compensation control unit, for regulating a proportion between the positive temperature compensation current and the negative temperature compensation current, so as to output a temperature compensation current;

a plurality of impedance units, comprising different impedance values; and

a plurality of switches, each comprising one end coupled to the current distribution unit and the other end coupled to the corresponding impedance unit, and controlled by the voltage compensation control signal, so as to generate the compensation bias at a common node of the switches and the current distribution unit.