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CENTRAL LC PLL WITH INJECTION LOCKED RING PLL OR DELL PER LANE

  • US 20120161827A1
  • Filed: 12/27/2011
  • Published: 06/28/2012
  • Est. Priority Date: 12/28/2010
  • Status: Abandoned Application
First Claim
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1. A clock circuit comprising:

  • a comparator for receiving a reference clock signal;

    a first VCO coupled to the comparator;

    a feedback divider coupled between the first VCO and the comparator;

    a clock distribution chain coupled to the feedback divider and the first VCO; and

    a second VCO coupled to the clock distribution chain for providing an output clock signal.

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