Nonvolatile Memory Devices

• US 20120163081A1
• Filed: 11/07/2011
• Published: 06/28/2012
• Est. Priority Date: 12/23/2010
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Jongyeol
• Granted Patent: US 8,625,351 B2
• Time in Patent Office: Days
• US Class Current: 365/185.11
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits

Abstract

Nonvolatile memory devices including a memory cell array with a plurality of memory blocks and a plurality of bit lines arranged at the memory cell array. Each of the plurality of memory blocks may include a plurality of strings arranged in rows and columns and formed to be vertical to a substrate. Strings of each row of each memory block are connected with the bit lines, respectively, and strings of each column of each memory block are connected in common with a corresponding one of the bit lines. One memory block of the plurality of memory blocks includes a first region for storing ROM data and a second region for storing replica ROM data for repairing the ROM data.

Claims

1. A nonvolatile memory device, comprising:

a memory cell array including a plurality of memory blocks, each of the plurality of memory blocks including strings arranged in rows and columns, the strings being vertical to a substrate, and at least one memory block of the plurality of memory blocks including a read-only-memory (ROM) data region and a replica ROM data region; and

a plurality of bit lines connected to the memory cell array, strings of each of the rows connected with the bit lines, and strings of each of the columns connected in common with a corresponding one of the bit lines.

2. The nonvolatile memory device of claim 1, wherein

the ROM data region includes first strings of one first row of the rows in the one memory block, and

the replica ROM data region includes second strings of one second row of the rows in the one memory block, the first row being different from the second row.

3. The nonvolatile memory device of claim 2, wherein the nonvolatile memory device is configured to execute read and program operations on the first strings independently from the second strings.

4. The nonvolatile memory device of claim 2, wherein

each of the first strings includes memory cells connected with word lines, the word lines including two first word lines and a plurality of second word lines, and

the nonvolatile memory device is configured to store ROM data in memory cells connected to the two first word lines, and maintain memory cells connected to the second word lines in an erase state.

5. The nonvolatile memory device of claim 4, wherein at least one of the second word lines is between the two first word lines.

6. The nonvolatile memory device of claim 5, wherein the nonvolatile memory device is configured to, at a read operation, drive the two first word lines using a ground voltage, and to drive the second word lines using a read voltage.

7. The nonvolatile memory device of claim 5, wherein the nonvolatile memory device is configured to, at a read operation, drive the two first word lines using a ground voltage, drive word lines of the second word lines that are adjacent to the two first word lines using a voltage higher than a read voltage, and drive the second word lines other than the adjacent second word lines using the read voltage.

8. A data storage device, comprising:

a nonvolatile memory device including a memory cell array with a plurality of memory blocks, each of the plurality of memory blocks including a plurality of strings arranged in rows and columns, the strings being vertical to a substrate, and at least one memory block of the plurality of memory blocks including a read-only-memory ROM data region and a replica ROM data region;

a plurality of bit lines connected to the memory cell array; and

a controller configured to control the nonvolatile memory device.

9. The data storage device of claim 8, wherein

strings of each of the rows are connected with the bit lines, and

strings of each of the columns are connected in common with a corresponding one of the bit lines.

10. The data storage device of claim 9, wherein

the ROM data region includes first strings of one first row of the rows in the one memory block, and

the replica ROM data region includes second strings of one second row of the rows in the one memory block, the first row being different from the second row.

11. The data storage device of claim 10, wherein the nonvolatile memory device is configured to execute read and program operations on the first strings independently from the second strings.

12. The data storage device of claim 11, wherein

each of the first strings includes memory cells connected with word lines, the word lines including two first word lines and a plurality of second word lines, and

the nonvolatile memory device is configured to store ROM data in memory cells connected to the two first word lines, and to maintain memory cells of the second word lines in an erase state.

13. The data storage device of claim 12, wherein at least one of the second word lines is between the two first word lines.

14. The data storage device of claim 13, wherein the nonvolatile memory device is configured to, at a read operation, drive the two first word lines using a ground voltage, and drive the second word lines using a read voltage.

15. The data storage device of claim 13, wherein the nonvolatile memory device is configured to, at a read operation, drive the two first word lines using a ground voltage, drive word lines of the second word lines that are adjacent to the two word lines using a voltage greater than a read voltage, and drive the second word lines other than the adjacent word lines using the read voltage.

16. A solid state drive comprising:

a storage medium including a plurality of nonvolatile memory devices, each of the nonvolatile memory devices including a memory cell array with a plurality of memory blocks and a plurality of bit lines connected to the memory cell array, each of the plurality of memory blocks including a plurality of strings arranged in rows and columns, the strings being vertical to a substrate, and at least one memory block of the plurality of memory blocks including a read-only-memory (ROM) data region and a replica ROM data region; and

a controller connected with the storage medium via a plurality of channels.

17. The solid state drive of claim 16, wherein

strings of the plurality of strings in each row are connected with the bit lines,

strings of the plurality of strings in each column are connected in common with a corresponding one of the bit lines,

the ROM data region includes first strings of one first row of the rows in the one memory block, and

the replica ROM data region includes second strings of one second row of the rows in the one memory block, the first row different from the second row.

18. The solid state drive of claim 17, wherein each of the nonvolatile memory devices are configured to execute read and program operations on the first strings independently from the second strings.

19. The solid state drive of claim 18, wherein

each of the first strings includes memory cells connected with word lines, the word lines including two first word lines and a plurality of second word lines,

each of the nonvolatile memory devices are configured to store ROM data in memory cells connected to the two first word lines, and to maintain an erase state in memory cells connected to the second word lines, and

at least one of the second word lines is between the two first word lines.

20. The solid state drive of claim 19, wherein the nonvolatile memory devices are configured to, at a read operation, drive the two first word lines using a ground voltage, and to drive the second word lines using a read voltage.

21. A nonvolatile memory device, comprising:

at least one vertical channel memory block including read-only-memory (ROM) data and replica ROM data.

22. The nonvolatile memory device of claim 21, wherein

the ROM data is stored in only one of a plurality of rows of vertical memory cell strings of the memory block, and

the ROM replica data is stored in only one of the plurality of rows.

23. The nonvolatile memory device of claim 22, wherein the only one row including the ROM data is a different row from the only one row including the ROM replica data.

24. The nonvolatile memory device of claim 23, wherein

each of the memory cell strings includes at least three vertically stacked memory cells each connected to a word line, and

the ROM data is only stored in memory cells connected to two word lines.

25. The nonvolatile memory device of claim 22, wherein

the at least one memory block is one of a plurality of memory blocks in a memory cell array, and

the at least one memory block is only one memory block.

26. The nonvolatile memory device of claim 25, wherein the nonvolatile memory device is configured to read and repair the ROM data using only the one memory block.