METHOD AND SYSTEMS FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING ON-OFF KEYING FOR POWER CONTROL

• US 20120166838A1
• Filed: 12/21/2011
• Published: 06/28/2012
• Est. Priority Date: 12/21/2011
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Nasrullah, Jawad, Kwan, Kelvin, Ditzel, David Roger, Svilan, Vjekoslav
• Granted Patent: US 9,280,190 B2
• Time in Patent Office: Days
• US Class Current: 713/322
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3231 Monitoring the presence, absence or movement of users
• CPC Class Codes: G06F 1/3234 Power saving characterised by the action undertaken
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Systems and a method for controlling power of a device with power management software are described. In one embodiment, a computer implemented method initiates power control having ON-OFF keying to control power consumption of a device for energy efficiency and energy conservation. An ON-OFF period of the ON-OFF keying for the device is computed. The method sets a target frequency, a target supply voltage, and a power gate control for the device based on the ON-OFF keying.

Claims

1. A computer-implemented method, comprising:

initiating power control having ON-OFF keying to control power consumption of a device for energy efficiency and energy conservation;

computing an ON-OFF period of the ON-OFF keying for the device; and

setting a target frequency, a target supply voltage, and a power gate control for the device based on the ON-OFF keying.

2. The computer-implemented method of claim 1, wherein the power gate control comprises one or more switches to control an ON condition and an OFF condition for one or more blocks of the device.

3. The computer-implemented method of claim 1, further comprising:

initiating power control with power control software;

computing the target frequency for the device based on one or more inputs;

selecting the ON-OFF keying based on at least one of voltage and frequency conditions, the target frequency, and one or more inputs; and

computing a physical frequency and supply voltage.

4. The computer-implemented method of claim 3, wherein the ON-OFF keying reduces power consumption of the device by alternating between the ON condition and the OFF condition.

5. The computer-implemented method of claim 4, wherein the device while in the OFF condition eliminates or at least reduces leakage power.

6. The computer-implemented method of claim 1, wherein the power control software to select ON-OFF keying for a minimum voltage condition (Vmin) and to select a voltage frequency scaling for voltages greater than Vmin.

7. A processor, comprising:

one or more processing elements to execute instructions of power control software to provide power control for energy efficiency and energy conservation; and

a power control block comprising,

one or more blocks under power control of the power control software;

one or more power gates coupled to the one or more blocks, the one or more power gates to control an ON condition and an OFF condition for the one or more blocks of the device, wherein at least one processing element is configured to execute instructions of the power control software to initiate ON-OFF keying to control power consumption of the one or more blocks, to compute an ON-OFF period of the ON-OFF keying for the one or more blocks, and set a target operating condition and a power gate control for the one or more blocks based on the ON-OFF keying.

8. The processor of claim 7, wherein at least one processing element is further configured to execute instructions of the power control software to compute the target operating condition including a target frequency for the power control block based on one or more inputs.

9. The processor of claim 7, wherein the power control block further comprises one or more voltage regulators to receive a voltage control input from the power control software and to provide controlled supply voltages for the one or more blocks.

10. The processor of claim 7, wherein the at least one processing element is further configured to execute instructions of the power control software to compute an actual operating condition including an actual frequency and an actual supply voltage.

11. The processor of claim 7, wherein computing the target operating condition includes computing a target frequency and a target supply voltage.

12. The processor of claim 7, the power control block further comprises one or more clock generators to receive a frequency control input from the power control software and to provide one or more controlled frequencies of clock signals for the one or more blocks, wherein the ON-OFF keying reduces power consumption of the one or more blocks by alternating between the ON condition and the OFF condition, wherein the one or more blocks while in the OFF condition eliminates or at least reduces leakage power.

13. A system, comprising:

a microcontroller to execute instructions of power control software to provide power control for energy efficiency and energy conservation; and

a device coupled to the microcontroller, the device comprises,

one or more blocks under power control of the power control software;

one or more power gates coupled to the one or more blocks, the one or more power gates to control an ON condition and an OFF condition for the one or more blocks of the device, wherein the microcontroller is configured to execute instructions of the power control software to initiate ON-OFF keying to control power consumption of the device, to compute an ON-OFF period of the ON-OFF keying for the device, and set a target operating condition and a power gate control for the device based on the ON-OFF keying.

14. The system of claim 13, wherein the microcontroller is further configured to execute instructions of the power control software to compute the target operating condition including a target frequency for the device based on one or more inputs.

15. The system of claim 13, wherein the device further comprises one or more voltage regulators to receive a voltage control input from the power control software and to provide controlled supply voltages for the device.

16. The system of claim 13, wherein the microcontroller is further configured to execute instructions of the power control software to compute an actual operating condition including an actual frequency and an actual supply voltage.

17. The system of claim 13, wherein computing the target operating condition includes computing a target frequency and a target supply voltage.

18. The system of claim 13, wherein the device further comprises one or more clock generators to receive a frequency control input from the power control software and to provide one or more controlled frequencies of clock signals for the one or more blocks.

19. The system of claim 13, wherein the ON-OFF keying reduces power consumption of the one or more blocks by alternating between the ON condition and the OFF condition.

20. The system of claim 19, wherein the one or more blocks while in the OFF condition eliminates or at least reduces leakage power.