INDEPENDENTLY BASED DIAGNOSTIC MONITORING

• US 20120166880A1
• Filed: 12/19/2011
• Published: 06/28/2012
• Est. Priority Date: 12/23/2010
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Greb, Karl Friedrich, Wenderlein, Gerhard Michael, Oak, Sunil
• Granted Patent: US 8,825,446 B2
• Time in Patent Office: Days
• US Class Current: 714/37
• CPC Class Codes: G06F 11/002 protecting against parasitic influences, e.g. noise, temperatures
• CPC Class Codes: G06F 11/26 Functional testing

Abstract

An independently based diagnostic system tests the execution of a processor. The processor is arranged to provide a diagnostic output that provides a pre-determined time-variant signal. The independently based diagnostic system has an independent basis from which to evaluate the pre-determined time-variant signal. The independent basis can be, for example, an independent time base that is separately generated from the processor time base used to clock the processor and/or an independent voltage source that is separate from the processor power supply. The independently based diagnostic system provides progressive notifications of the results of successive evaluations of the pre-determined time-variant signal.

Claims

1. An independently based diagnostic system, comprising:

an evaluator that is arranged to receive a diagnostic output from a monitored processor, wherein the diagnostic output is a pre-determined time-variant signal, and wherein the evaluator is arranged to perform successive evaluations upon the received diagnostic output using a comparison signal;

a comparison signal generator that is arranged to independently generate the comparison signal using a basis that is generated independently of the monitored processor; and

a notification interface that provides progressive notifications of the results of successive evaluations of the diagnostic output.

2. The circuit of claim 1, wherein the processor is performing a safety-related process.

3. The circuit of claim 1, wherein the basis that is generated independently of the monitored processor is a frequency.

4. The circuit of claim 1, wherein the basis that is generated independently of the monitored processor is a voltage level.

5. The circuit of claim 1, wherein the basis that is generated independently of the monitored processor includes a frequency and a voltage level.

6. The circuit of claim 1, wherein the evaluator is arranged to perform successive evaluations upon the received diagnostic output to determine the frequency of the diagnostic output during each successive evaluation.

7. The circuit of claim 6, wherein the received diagnostic output is generated by the monitored processor while performing a safety-related process for a vehicle in which the monitored processor is arranged.

8. The circuit of claim 1, wherein the evaluator and the notification interface are arranged in a common substrate with the monitored processor.

9. The circuit of claim 8, wherein the comparison signal generator is a timing processor that is arranged in a common substrate with the monitored processor.

10. The circuit of claim 1, wherein the notification interface is arranged to provide an error notification when one or more successive frequency evaluations performed by the evaluator on the diagnostic signal indicates a frequency evaluation falls outside of a predetermined range.

11. The circuit of claim 1, wherein the wherein the comparison signal generator includes a first timing processor and a second timing processor that are arranged to generate the comparison signal for evaluating a diagnostic signal that includes a complex waveform.

12. A processing system, comprising:

a monitored processor that is arranged to generate diagnostic output that is pre-determined and time-variant and includes a sequence of fixed frequencies;

a diagnostic monitor that is arranged to receive the diagnostic output from the monitored processor, to perform successive evaluations upon the received diagnostic output using a comparison signal includes a sequence of fixed frequencies, to independently generate the comparison signal using a basis that is generated independently of the monitored processor; and

to provide progressive notifications of the results of successive evaluations of the pre-determined time-variant signal; and

a user interface that is arranged to operate in response to an indication of an error within the provided progressive notifications.

13. The system of claim 12 wherein the monitored processor performs a safety-related process concurrently with generating the diagnostic output.

14. The system of claim 12 wherein diagnostic monitor is arranged to count pulses of the diagnostic output and a first comparison signal generated by a first timing processor and generate an error indication when the difference between the counted pulses of the diagnostic output and the counted pulses of the comparison signal fall outside of a predetermined range.

15. The system of claim 14, wherein diagnostic monitor is arranged to count pulses of the diagnostic output and a second comparison signal generated by a second timing processor and generate an error indication when the difference between the counted pulses of the diagnostic output and the counted pulses of the second comparison signal fall outside of a predetermined range.

16. A method for monitoring the execution of a safety-related processor, comprising:

receiving a diagnostic output from the safety-related processor, wherein the diagnostic output is a pre-determined time-variant signal;

performing successive evaluations upon the received diagnostic output using a comparison signal;

independently generating the comparison signal using a basis that is generated independently of the safety-related processor; and

providing progressive notifications of the results of successive evaluations of the diagnostic output.

17. The method of claim 16, wherein the basis that is generated independently of the monitored processor includes at least one of a frequency and a voltage level.

18. The method of claim 17, performing successive evaluations upon the received diagnostic output to determine the frequency of the diagnostic output during each successive evaluation.

19. The method of claim 17, comprising counting pulses of the diagnostic output and a first comparison signal generated by a first timing processor and generating an error indication when the difference between the counted pulses of the diagnostic output and the counted pulses of the comparison signal fall outside of a predetermined range.

20. The method of claim 16, comprising providing a common substrate in which the safety-related processor is arranged and in which the successive evaluations upon the received diagnostic output using a comparison signal are performed.