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COMMUNICATION CIRCUIT AND METHOD OF ADJUSTING SAMPLING CLOCK SIGNAL

  • US 20120177160A1
  • Filed: 12/27/2011
  • Published: 07/12/2012
  • Est. Priority Date: 01/06/2011
  • Status: Active Grant
First Claim
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1. A communication circuit that receives communication data in asynchronous serial communications, the communication circuit comprising:

  • a sampling clock generating circuit configured to generate a sampling clock signal having a frequency that is “

    m”

    times greater than a it rate of the communication data and containing “

    n”

    pulses in each bit period of the communication data, “

    m”

    being an integer greater than or equal to 4, “

    n”

    being an odd number less than “

    m”

    ;

    a sampling circuit configured to sample the communication data based on the sampling clock signal to obtain “

    n”

    sets of received data in each bit period of the communication data; and

    a majority circuit configured to perform a majority operation on values of the “

    n”

    sets of received data to determine a majority value and to output the majority value as received data of the corresponding bit period,wherein the sampling clock generating circuit is configuredto delay the sampling clock signal by a predetermined amount when a value of a first one or more of the “

    n”

    sets of received data is different from a value of a rest of the “

    n”

    sets of received data, andto advance the sampling clock signal by the predetermined amount when a value of a last one or more of the “

    n”

    sets of received data is different from a value of a rest of the “

    n”

    sets of received data.

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