MICRO-INTERCONNECTS FOR LIGHT-EMITTING DIODES

• US 20120181568A1
• Filed: 01/13/2011
• Published: 07/19/2012
• Est. Priority Date: 01/13/2011
• Status: Active Grant

• Current Assignee: Epistar Corporation
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Hsia, Hsing-Kuo, Yu, Chih-Kuang
• Granted Patent: US 8,653,542 B2
• Time in Patent Office: Days
• US Class Current: 257/99
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/12036 PN diode
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2933/0033 relating to semiconductor body packages
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/382 the electrode extending partially in or entirely through the semiconductor body
• CPC Class Codes: H01L 33/486 adapted for surface mounting
• CPC Class Codes: H01L 33/50 Wavelength conversion elements
• CPC Class Codes: H01L 33/54 having a particular shape
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

The present disclosure provides a method of fabricating a light emitting diode (LED) package. The method includes bonding a plurality of separated light emitting diode (LED) dies to a substrate, wherein each of the plurality of separated LED dies includes an n-doped layer, a quantum well active layer, and a p-doped layer; depositing an isolation layer over the plurality of separated LED dies and the substrate; etching the isolation layer to form a plurality of via openings to expose portions of each LED die and portions of the substrate; forming electrical interconnects over the isolation layer and inside the plurality of via openings to electrically connect between one of the doped layers of each LED die and the substrate; and dicing the plurality of separated LED dies and the substrate into a plurality of LED packages.

Claims

1. A method of fabricating a plurality of light emitting diode (LED) packages, comprising:

bonding a plurality of separated LED dies to a substrate, wherein each of the plurality of separated LED dies includes an n-doped layer, a quantum well active layer, and a p-doped layer;

depositing an isolation layer over the plurality of separated LED dies and the substrate;

etching the isolation layer to form a plurality of via openings to expose portions of each LED die and portions of the substrate;

forming electrical interconnects over the isolation layer and inside the plurality of via openings to electrically connect between one of the doped layers of each LED die and the substrate; and

dicing the plurality of separated LED dies and the substrate into a plurality of LED packages.

2. The method of claim 1, wherein the bonding comprises bonding an electrode of one of the separated LED dies to a bonding contact disposed on the substrate.

3. The method of claim 1, wherein the substrate comprises a plurality of through silicon vias (TSVs), each of the plurality of TSVs being coupled with one of the n-doped layer and the p-doped layer.

4. The method of claim 1, wherein the bonding comprises forming a thermal conductive path for transferring heat away from one of the separated LED dies.

5. The method of claim 1, wherein the bonding comprises bonding a carrier substrate of one of the separated LED dies to a bonding contact disposed on the substrate.

6. The method of claim 1, wherein the forming electrical interconnects comprises depositing an interconnect layer and filling the plurality of via openings with the interconnect layer to form a plurality of electrical vias to the exposed portions of each LED die and the exposed portions of the substrate.

7. The method of claim 6, wherein the depositing an interconnect layer comprises:

depositing a barrier layer over the isolation layer;

depositing a seed metal layer over the barrier layer;

laminating a photoresist layer over the seed metal layer;

patterning the photoresist layer to define one or more channels for one or more re-distribution lines;

metal plating the channels with a metal to form the one or more metal re-distribution lines and to fill the plurality of via openings with the metal; and

removing the photoresist layer.

8. The method of claim 6, wherein the depositing an interconnect layer comprises depositing a transparent conductive layer over the isolation layer and to fill the plurality of via openings with the transparent conductive layer.

9. The method of claim 1, wherein the exposed portions of one of the separated dies include an n-contact metallization, the exposed portions of the substrate include a contact electrode disposed on the substrate, and the n-contact metallization and the contact electrode are electrical interconnected.

10. The method of claim 1, wherein the exposed portions of one of the separated dies include a p-contact metallization, the exposed portions of the substrate include a contact electrode disposed on the substrate, and the p-contact metallization and the contact electrode are electrical interconnected.

11. The method of claim 1, further comprising removing a growth substrate from one of the separated LED dies after the bonding and before the depositing.

12. The method of claim 1, further comprising removing the substrate before the dicing the plurality of separated LED dies into the plurality of LED packages.

13. The method of claim 1, further comprising forming a phosphor layer and a lens over each LED die after the forming electrical interconnects and before the dicing.

14. A method of fabricating a plurality of light emitting diode (LED) packages, comprising:

providing a plurality of separated LED dies, wherein each of the plurality of separated dies includes an n-doped layer, a quantum well active layer, a p-doped layer, and a p-contact metal layer on a growth substrate;

bonding the p-contact metal layer of the plurality of separated LED dies to a substrate;

removing the growth substrate from the plurality of separated LED dies;

depositing an isolation layer over the plurality of separated LED dies and the substrate;

etching the isolation layer to form a plurality of via openings to expose portions of each of the plurality of separated LED dies and portions of the substrate;

depositing an interconnect layer over the isolation layer and the plurality of via openings to form electrical interconnects between the n-doped layer of each of the plurality of separated LED dies and the substrate;

forming a phosphor layer and a lens over each of the plurality of separated LED dies; and

dicing the plurality of separated LED dies and the substrate into a plurality of LED packages.

15. The method of claim 14, wherein the bonding electrically connects the p-doped layer of the plurality of separated dies to the substrate.

16. The method of claim 14, wherein the etching the isolation layer comprises forming a plurality of via openings to expose the n-doped layer of the plurality of separated dies.

17. The method of claim 14, wherein the depositing an interconnect layer comprises metal plating with a metal layer to fill the plurality of via openings and to form an electrical interconnection between the n-doped layer and an electrode on the substrate.

18. The method of claim 14, wherein the depositing an interconnect layer comprises depositing a transparent conductive layer over the isolation layer and to fill the plurality of via openings to form an electrical interconnection between the n-doped layer and an electrode on the substrate.

19. A light emitting diode (LED) device comprising:

a substrate including a bonding contact and an electrode;

an LED die bonded to the substrate through the bonding contact;

an isolation layer disposed over the LED die and the substrate, wherein the isolation layer includes a plurality of via openings to expose portions of the LED die and the electrode of the substrate; and

an interconnect layer deposited over the isolation layer and the plurality of via openings to electrically connect the LED die to the electrode of the substrate.

20. The device of claim 19, wherein the bonding contact and the electrode are configured to electrically couple through a through-silicon via (TSV) embedded in the substrate.