SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME

• US 20120181693A1
• Filed: 09/23/2011
• Published: 07/19/2012
• Est. Priority Date: 01/17/2011
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd. (Samsung Group)
• Original Assignee: Samsung Electronics Co. Ltd. (Samsung Group)
• Inventors: Kim, Jeeyong, Park, Jong-Hyun, Kang, Jin-Kyu, Lee, Joonhee
• Application Number:
  US13/241,741
• Publication Number:
  US 20120181693A1
• Time in Patent Office: Days
• US Class Current: 257/751
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence
• CPC Class Codes: H01L 21/7685 the layer covering a conductive structure H01L21/76849 takes precedence
• CPC Class Codes: H01L 23/5226 Via connections in a multilevel interconnection structure
• CPC Class Codes: H01L 23/53223 Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/53266 Additional layers associated with refractory-metal layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/53271 containing semiconductor material, e.g. polysilicon
• CPC Class Codes: H01L 23/53285 containing superconducting materials
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device may include an upper interconnection on a substrate and an anti-reflection pattern disposed on the upper interconnection. The anti-reflection pattern may include a compound including a metal, carbon and nitrogen.

Claims

1. A semiconductor device comprising:

a substrate;

an upper interconnection on the substrate; and

an anti-reflection pattern disposed on the upper interconnection, wherein the anti-reflection pattern comprises a compound including a metal, carbon and nitrogen.

2. The semiconductor device of claim 1, wherein the compound included in the anti-reflection pattern has a carbon content of 5-40 atomic %.

3. The semiconductor device of claim 1, wherein the compound included in the anti-reflection pattern further comprises oxygen.

4. The semiconductor device of claim 1, wherein the upper interconnection and the anti-reflection pattern are directly in contact with each other.

5. The semiconductor device of claim 1, further comprising:

a mold dielectric film and an interlayer dielectric film that are sequentially stacked between the substrate and the upper interconnection;

a lower interconnection in the mold dielectric film;

a capping film between the lower interconnection and the interlayer dielectric film; and

a contact plug penetrating the interlayer dielectric film and the capping film between the upper interconnection and the lower interconnection and electrically connecting the upper interconnection and the lower interconnection.

6. The semiconductor device of claim 5, wherein the capping film comprises a nitride.

7. The semiconductor device of claim 5, wherein a mobile element in the semiconductor device has a diffusion coefficient in the compound included in the anti-reflection pattern that is greater than the diffusion coefficient of the mobile element in the capping film.

8. The semiconductor device of claim 1, wherein a mobile element in the semiconductor device has a diffusion coefficient in the compound included in the anti-reflection pattern that is greater than the diffusion coefficient of the mobile element in PVD-metal nitride.

9. The semiconductor device of claim 1, wherein the compound included in the anti-reflection pattern is selected from at least one of titanium carbon nitride and titanium carbon oxygen nitride.

10. The semiconductor device of claim 1, wherein the compound included in the anti-reflection pattern has a density lower than the density of PVD-metal nitride.

11. The semiconductor device of claim 1, wherein the upper interconnection comprises:

an electrically conductive line; and

a barrier pattern lining the electrically conductive line.

12. The semiconductor device of claim 11, wherein the electrically conductive line comprises at least one of a doped semiconductor, a metal, and a conductive metal-semiconductor compound, and wherein the barrier pattern comprises at least one of a metal nitride and a transition metal.

13-17. -17. (canceled)

18. A semiconductor device comprising:

a substrate;

a first layer on the substrate, the first layer including a mold dielectric film that defines a trench and a lower interconnection mounted in the trench, wherein the lower interconnection includes a first electrically conductive line and a first barrier pattern between the first electrically conductive line and both the mold dielectric film and the substrate;

a second layer on the first layer on an opposite side of the first layer from the substrate, the second layer including (a) a capping film on the lower interconnection, (b) an interlayer dielectric film on the capping film, wherein the interlayer dielectric film defines a trench, and (c) a contact plug in the trench and on the lower interconnection, wherein the contact plug includes a contact conductive pattern and a contact barrier pattern between the contact conductive pattern and both the interlayer dielectric film and the lower interconnection;

a third layer on the second layer on an opposite side of the second layer from the first layer, the third layer including an upper interconnection including a second electrically conductive line and a second barrier pattern between the second electrically conductive line and the second layer; and

an anti-reflection pattern on the second electrically conductive line on an opposite side of the electrically conductive line from the second barrier pattern, wherein the anti-reflection pattern comprises a compound including a metal, carbon and nitrogen.

19. The semiconductor device of claim 18, wherein the capping film has a composition in which hydrogen has a diffusion coefficient that is lower than the diffusion coefficient of hydrogen in the anti-reflection pattern.

20. The semiconductor device of claim 18, wherein:

the substrate comprises at least one of silicon and germanium;

the mold dielectric film and the interlayer dielectric film comprise at least one selected from an oxide, a nitride and an oxynitride;

the first and second electrically conductive lines as well as the contact conductive pattern comprise at least one selected from a doped semiconductor, a metal and a conductive metal-semiconductor compound;

the first and second barrier patterns as well as the contact barrier pattern comprise at least one selected from a metal nitride and a transition metal; and

the capping film comprises a nitride.