HARDWARE GENERATION OF IMAGE DESCRIPTORS

• US 20120182442A1
• Filed: 01/11/2012
• Published: 07/19/2012
• Est. Priority Date: 01/14/2011
• Status: Abandoned Application

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Inventors: Kirsch, Graham
• Application Number:
  US13/348,352
• Publication Number:
  US 20120182442A1
• Time in Patent Office: Days
• US Class Current: 348/222.1
• CPC Class Codes: G06V 10/462 Salient features, e.g. scale invariant feature transforms [SIFT]
• CPC Class Codes: G06V 10/50 by performing operations within image blocks; by using histograms, e.g. histogram of oriented gradients [HoG]; by summing image-intensity values; Projection analysis
• CPC Class Codes: G06V 10/94 Hardware or software architectures specially adapted for image or video understanding
• CPC Class Codes: H04N 23/80 Camera processing pipelines; Components thereof
• CPC Class Codes: H04N 23/951 by using two or more images to influence resolution, frame rate or aspect ratio

Abstract

Interest point and description circuitry is provided for tracking an object through multiple image frames. Interest point and description circuitry may be provided on an integrated circuit in an imaging device. Interest points and descriptors may be calculated at frame rate. A feature detection function may be applied to scaled images to extract interest points. Descriptors may be rotating circular gradient-histogram descriptors. Descriptors may have one or two rings, each having equal area. Descriptors may have discrete rotational positions and discrete scaling. Gradient-histograms may be calculated for the descriptors using angular, radial, and directional weighting components.

Claims

1. An electronic device, comprising:

an image sensor that captures images; and

interest point and descriptor circuitry, comprising;

first circuitry for downscaling the images by a first octave; and

second circuitry for downscaling the images by a second octave, wherein the second circuitry is reused for downscaling the images by at least a third octave, and wherein the interest point and descriptor circuitry is configured to extract interest points and descriptors for the images as the images are received from the image sensor.

2. The electronic device defined in claim 1, wherein the interest point and descriptor circuitry further comprises:

gradient calculating circuitry that is configured to calculate gradient histograms from an octave base image for each of the first, second, third octaves; and

descriptor extraction circuitry that receives the gradient histograms from the gradient calculating circuitry and that is configured to extract the descriptors for the images, wherein the descriptors comprise circular gradient-histogram descriptors having discrete rotational positions and discrete scaling.

3. The electronic device defined in claim 2, wherein the interest point and descriptor circuitry further comprises interest point detection circuitry that is configured to extract the interest points for the images using a second-derivative blob detection function.

4. The electronic device defined in claim 3, wherein the circular gradient-histogram descriptors each have at least two rings of equal area.

5. The electronic device defined in claim 4, wherein the descriptor extraction circuitry is configured to extract the descriptors using an angular weighting component, a radial weighting component, and a directional weighting component.

6. The electronic device defined in claim 5, wherein the interest point and descriptor circuitry further comprises orientation assignment circuitry that receives the gradient histograms from the gradient calculating circuitry and that is configured to determine orientations for the interest points.

7. The electronic device defined in claim 6, wherein the interest point and descriptor circuitry further comprises a buffer comprising:

a first input coupled to the first circuitry for downscaling the images;

a second input coupled to the second circuitry downscaling the images;

a first output coupled to the gradient calculating circuitry;

a second output coupled to the interest point detection circuitry; and

a third output coupled to the second circuitry for downscaling the images.

8. A method for extracting interest points and descriptors from images on an image processing integrated circuit, comprising:

receiving, at the image processing integrated circuit, a plurality of images of an object, wherein the plurality of images are received at a frame rate;

extracting interest points on the object for the plurality of images, wherein the extracting of interesting points is performed by the image processing integrated circuit at frame rate;

extracting descriptors for the interest points, wherein the extracting of descriptors is performed by the image processing integrated circuit at frame rate, wherein the descriptors comprise rotating gradient-histogram descriptors having discrete rotational positions and discrete scaling.

9. The method defined in claim 8, wherein extracting interest points for the interest points comprises:

scaling each image using Gaussian functions to produce a plurality of scaled images for each image; and

applying a second derivative feature detection function to each of the plurality of scaled images, wherein the plurality of scaled images have sub-octave scaling.

10. The method defined in claim 9, wherein extracting descriptors for the interest points comprises:

extracting descriptors using gradient histograms calculated from an octave base image for each octave; and

selecting a scale for each descriptor from a set of descriptor templates having a fixed sub-octave scale resolution.

11. The method defined in claim 10, wherein extracting descriptors for the interest points comprises calculating gradient histograms using angular weights and radial weights and wherein the radial weights have Gaussian profiles.

12. The method defined in claim 10, wherein extracting descriptors for the interest points further comprises calculating gradient histograms using an angular weighting component, a radial weighting component, and a directional weighting component.

13. The method defined in claim 10, wherein the descriptors comprise one or more rings, wherein each ring is radially divided into cells, and wherein the image processing integrated circuit stores only a portion of each image at a time.

14. Circuitry on an integrated circuit, comprising:

feature extraction circuitry that extracts interest points from each of a plurality of images; and

descriptor extraction circuitry that is configured to construct descriptors associated with each of the interest points, wherein the descriptors comprise rotating gradient-histogram descriptors having discrete rotational positions.

15. The circuitry defined in claim 14, wherein the descriptors each comprise:

an inner ring of cells having an inner area; and

an outer ring of cells having an outer area, wherein the outer area is the same as the inner area.

16. The circuitry defined in claim 15, wherein each descriptor has a size that is selected from a set of descriptor templates having fixed sub-octave scales.

17. The circuitry defined in claim 16, wherein the descriptors are constructed using gradient histograms calculated from an octave base image for each octave and wherein gradient weighting for the gradient histograms is performed for each descriptor using an angular component, a radial component, and a directional weighting component.

18. The circuitry defined in claim 17, wherein each descriptor template has an associated radial weight having a Gaussian profile.

19. The circuitry defined in claim 14, wherein the feature extraction circuitry is configured to apply successive Gaussian blurs to each of the plurality of images to produce a plurality of blurred images, wherein the plurality of blurred images have a scale that is measured in octaves, and wherein no interest points are extracted from blurred images in a first octave above a base scale.

20. The circuitry defined in claim 19, wherein the feature extraction circuitry is configured to apply a feature detection function to the blurred images and wherein the feature detection function comprises a second-derivative function.