APPARATUS AND METHOD FOR DETECTING A MEMORY ACCESS ERROR

• US 20120185741A1
• Filed: 07/13/2011
• Published: 07/19/2012
• Est. Priority Date: 01/14/2011
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Grekhov, Sergey Sergeevich, Gerenkov, Alexey Anatolevich, Gorelkina, Ekaterina Anatolevna
• Application Number:
  US13/181,844
• Publication Number:
  US 20120185741A1
• Time in Patent Office: Days
• US Class Current: 714/719
• CPC Class Codes: G06F 11/362 Software debugging

Abstract

Provided are an apparatus and method for detecting a memory access error in a computer system. The apparatus and method may intercept a sub-system that processes a request for access to a memory, and may be applied to various computer systems without causing any performance deterioration. The apparatus includes a sub-system configured to process a request for access to a memory, and an interception module configured to detect a memory access address by intercepting the sub-system.

Claims

1. An apparatus for detecting a memory access error in a computer, the apparatus comprising:

a sub-system configured to process a request for access to memory;

a detection unit configured to detect a memory access address by intercepting the sub-system; and

an error determination unit configured to determine whether a memory access error has occurred by comparing the memory access address with addresses in a first memory region that is an additional memory region, addresses in a second memory region that is a memory region to which objects are allocated, and addresses in a third memory region that is a memory region to which no objects are allocated.

2. The apparatus of claim 1, further comprising an allocation unit configured to intercept a memory allocation request signal and allocate the first and second memory regions to a memory each time a memory allocation request signal is intercepted.

3. The apparatus of claim 2, further comprising a setting unit configured to block access to the first and second memory regions.

4. The apparatus of claim 1, wherein the error determination unit is further configured to determine that a memory access error has occurred, in response to the memory access address belonging to the first memory region or the third memory region.

5. The apparatus of claim 1, wherein the error determination unit is further configured to determine that no memory access error has occurred, in response to the memory access address belonging to the second memory region.

6. The apparatus of claim 5, further comprising a setting unit configured to unblock access to the first and second memory regions.

7. The apparatus of claim 1, wherein a size of the first memory region is determined based on a size of pages in the memory, a size of the second memory region, and a main size that is determined based on the size of pages in the memory.

8. A method of detecting a memory access error in a computer, the method comprising:

detecting a memory access address by intercepting a sub-system that processes a request for access to a memory; and

determining whether a memory access error has occurred by comparing the memory access address with addresses in a first memory region that is an additional memory region, addresses in a second memory region that is a memory region to which objects are allocated, and addresses in a third memory region that is a memory region to which no objects are allocated.

9. The method of claim 8, further comprising:

intercepting a memory allocation request signal; and

allocating the first and second memory regions to memory each time a memory allocation request signal is intercepted.

10. The method of claim 9, further comprising blocking access to the first and second memory regions.

11. The method of claim 8, wherein the determining comprises determining that a memory access error has occurred, in response to the memory access address belonging to the first memory region or the third memory region.

12. The method of claim 8, wherein the determining comprises determining that no memory access error has occurred, in response to the memory access address belonging to the second memory region.

13. The method of claim 12, further comprising unblocking access to the first and second memory regions.

14. The method of claim 8, wherein a size of the first memory region is determined based on a size of pages in the memory, a size of the second memory region, and a main size that is determined based on the size of pages in the memory.

15. A terminal comprising a sub-system for processing a request for access to a memory, the terminal comprising:

an interception module configured to intercept a memory address included in a memory allocation request signal that is sent to the sub-system; and

a determination unit configured to determine a memory access error by comparing the memory address with addresses stored in the memory, and in response to determining that a memory access error has occurred, the determination unit is configured to block access to the memory.

16. The terminal of claim 15, wherein the interception module is further configured to intercept a memory allocation request signal or memory deallocation request signal that is input to an interface of the memory, and configured to allocate a first memory region to detect an overflow and a second memory region to which objects are allocated, each time a memory allocation request signal or memory deallocation request signal is intercepted at the interface of the memory.

17. The terminal of claim 16, wherein the interception module is configured to block access to the first and second memory regions.

18. The terminal of claim 17, wherein the determination unit is configured to compare the memory address to addresses included in the first and second memory regions.

19. The terminal of claim 18, wherein, in response to the determination unit determining that the memory address belongs to the first memory region or to another inaccessible memory region, the interception module is configured to continue to block access to the first and second memory regions.

20. The terminal of claim 18, wherein, in response to the determination unit determining that the memory belongs to the second memory region to which objects are allocated, the interception module is configured to unblock access to the first and second memory regions.