Semiconductor Integrated Circuit Having a Switched Charge Pump Unit and Operating Method Thereof
First Claim
1. A semiconductor integrated circuit comprising:
- a digital amplifier including a high side output device, a low side output device, and a driver; and
a charge pump unit supplied with a positive operating voltage and configured to generate a positive power supply voltage and a negative power supply voltage in response thereto,wherein the driver of the digital amplifier operates with the positive power supply voltage and the negative power supply voltage, and a first output terminal and a second output terminal of the driver are coupled to a control input terminal of the high side output device and a control input terminal of the low side output device, respectively,wherein an output current path of the high side output device is coupled between the positive power supply voltage and an output terminal of the digital amplifier, and an output current path of the low side output device is coupled between the output terminal of the digital amplifier and the negative power supply voltage,wherein the output terminal of the digital amplifier is coupled to a low pass filter including an inductor and a filter capacitor,wherein the charge pump unit comprises a first switch through a fifth switch, and a first capacitor through a fourth capacitor, all connected via a first node through a sixth node,wherein the positive operating voltage is supplied to one end of the first capacitor via the first switch, a ground potential is supplied to one end of the second capacitor via the second switch, and the other end of the first capacitor and the other end of the second capacitor are coupled to a second node,wherein the one end of the first capacitor is coupled to one end of the third capacitor via the third switch, the one end of the second capacitor is coupled to one end of the fourth capacitor via the fourth switch, a second node is connected to the other end of the third capacitor and the other end of the fourth capacitor and is coupled to the ground potential, and the second node is coupled to the fifth node via the fifth switch,wherein the positive power supply voltage is generated from the one end of the third capacitor, and the negative power supply voltage is generated from the one end of the fourth capacitor,wherein the charge pump unit further comprises a sixth switch coupled between the one end of the third capacitor and the second node, andwherein the regenerative current which flows between the capacitor of the low pass filter and the positive power supply voltage or the negative power supply voltage, via the inductor and the high side output device or the low side output device in an on state, is absorbed by the second capacitor, by controlling the sixth switch of the charge pump unit to an on state.
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Accused Products
Abstract
Power source noises of a digital amplifier arising from regenerative current of an inductor of a low pass filter is reduced. A semiconductor integrated circuit includes: a digital amplifier, a driver; and a charge pump unit which is supplied with a positive operating voltage and generates a positive power supply voltage and a negative power supply voltage. An output terminal of the digital amplifier is coupled to a low pass filter including an inductor and a filter capacitor. The charge pump unit includes a first switch through a sixth switch, and a first capacitor through a fourth capacitor, all connected via a first node through a sixth node. Regenerative current which flows between the filter capacitor and the positive power supply voltage or the negative power supply voltage is absorbed by the second capacitor, by controlling the sixth switch to an on state.
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Citations
28 Claims
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1. A semiconductor integrated circuit comprising:
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a digital amplifier including a high side output device, a low side output device, and a driver; and a charge pump unit supplied with a positive operating voltage and configured to generate a positive power supply voltage and a negative power supply voltage in response thereto, wherein the driver of the digital amplifier operates with the positive power supply voltage and the negative power supply voltage, and a first output terminal and a second output terminal of the driver are coupled to a control input terminal of the high side output device and a control input terminal of the low side output device, respectively, wherein an output current path of the high side output device is coupled between the positive power supply voltage and an output terminal of the digital amplifier, and an output current path of the low side output device is coupled between the output terminal of the digital amplifier and the negative power supply voltage, wherein the output terminal of the digital amplifier is coupled to a low pass filter including an inductor and a filter capacitor, wherein the charge pump unit comprises a first switch through a fifth switch, and a first capacitor through a fourth capacitor, all connected via a first node through a sixth node, wherein the positive operating voltage is supplied to one end of the first capacitor via the first switch, a ground potential is supplied to one end of the second capacitor via the second switch, and the other end of the first capacitor and the other end of the second capacitor are coupled to a second node, wherein the one end of the first capacitor is coupled to one end of the third capacitor via the third switch, the one end of the second capacitor is coupled to one end of the fourth capacitor via the fourth switch, a second node is connected to the other end of the third capacitor and the other end of the fourth capacitor and is coupled to the ground potential, and the second node is coupled to the fifth node via the fifth switch, wherein the positive power supply voltage is generated from the one end of the third capacitor, and the negative power supply voltage is generated from the one end of the fourth capacitor, wherein the charge pump unit further comprises a sixth switch coupled between the one end of the third capacitor and the second node, and wherein the regenerative current which flows between the capacitor of the low pass filter and the positive power supply voltage or the negative power supply voltage, via the inductor and the high side output device or the low side output device in an on state, is absorbed by the second capacitor, by controlling the sixth switch of the charge pump unit to an on state. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An operating method of a semiconductor integrated circuit,
wherein the semiconductor integrated circuit comprises: -
a digital amplifier including a high side output device, a low side output device, and a driver; and a charge pump unit supplied with a positive operating voltage and configured to generate a positive power supply voltage and a negative power supply voltage in response thereto, wherein the driver of the digital amplifier operates with the positive power supply voltage and the negative power supply voltage, and a first output terminal and a second output terminal of the driver are coupled to a control input terminal of the high side output device and a control input terminal of the low side output device, respectively, wherein an output current path of the high side output device is coupled between the positive power supply voltage and an output terminal of the digital amplifier, and an output current path of the low side output device is coupled between the output terminal of the digital amplifier and the negative power supply voltage, wherein the output terminal of the digital amplifier is coupled to a low pass filter including an inductor and a filter capacitor, wherein the charge pump unit comprises a first switch through a fifth switch, and a first capacitor through a fourth capacitor, all connected via a first node through a sixth node, wherein the positive operating voltage is supplied to one end of the first capacitor via the first switch, a ground potential is supplied to one end of the second capacitor via the second switch, and the other end of the first capacitor and the other end of the second capacitor are coupled to a second node, wherein the one end of the first capacitor is coupled to one end of the third capacitor via the third switch, the one end of the second capacitor is coupled to one end of the fourth capacitor via the fourth switch, a fifth node is connected to the other end of the third capacitor and the other end of the fourth capacitor and is coupled to the ground potential, and the second node is coupled to the fifth node via the fifth switch, wherein the positive power supply voltage is generated from the one end of the third capacitor, and the negative power supply voltage is generated from the one end of the fourth capacitor, and wherein the charge pump unit further comprises a sixth switch coupled between the one end of the third capacitor and the second node, the method comprising; controlling the sixth switch of the charge pump unit to an on state to thereby cause the second capacitor to absorb regenerative current which flows between the filter capacitor of the low pass filter and the positive power supply voltage or the negative power supply voltage, via the inductor and the high side output device or the low side output device. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A semiconductor integrated circuit comprising:
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a digital amplifier including a high side output device, a low side output device, and a driver; and a charge pump unit operable to generate a positive power supply voltage and a negative power supply voltage to be supplied to the digital amplifier, by being supplied with a positive operating voltage, wherein the driver of the digital amplifier operates with the positive power supply voltage and the negative power supply voltage, and a first output terminal and a second output terminal of the driver are coupled to a control input terminal of the high side output device and a control input terminal of the low side output device, respectively, wherein an output current path of the high side output device is coupled between the positive power supply voltage and an output terminal of the digital amplifier, and an output current path of the low side output device is coupled between the output terminal of the digital amplifier and the negative power supply voltage, wherein the output terminal of the digital amplifier is coupled to a low pass filter including an inductor and a filter capacitor, wherein the charge pump unit comprises a first switch through a fifth switch, and a first capacitor through a fourth capacitor, all connected via a first node through a sixth node, wherein the positive operating voltage is supplied to one end of the first capacitor via the first switch, a ground potential is supplied to one end of the second capacitor via the second switch, and the other end of the first capacitor and the other end of the second capacitor are coupled to a second node, wherein the one end of the first capacitor is coupled to one end of the third capacitor via the third switch, the one end of the second capacitor is coupled to one end of the fourth capacitor via the fourth switch, a fifth node is connected to the other end of the third capacitor and the other end of the fourth capacitor and is coupled to the ground potential, and the second node is coupled to the fifth node via the fifth switch, wherein the positive power supply voltage is generated from the one end of the third capacitor, and the negative power supply voltage is generated from the one end of the fourth capacitor, and wherein the charge pump unit further comprises a sixth switch coupled between the one end of the third capacitor and the second node.
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22. A semiconductor integrated circuit comprising:
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a digital signal processing unit configured to output digital audio signal (B) and a digital control signal (D1); an electronic volume control unit configured to receive, as input, the digital audio signal (B) and the digital control signal (D1), and output a digital audio amplified signal (E) in response thereto; a digital amplifier configured to receive the digital audio amplified signal (E) and output a digital audio amplified output signal suitable for filtering and driving a speaker in response thereto; and
aa charge pump unit supplied with a positive operating voltage (+Vop) and a ground potential (GND) and configured to generate a positive power supply voltage (+Vcc) and a negative power supply voltage (−
Vcc);wherein; the charge pump unit comprises a first switch through a fifth switch and a first node through a sixth node; first switch (SW1) selectively connects the positive operating voltage (+Vop) to the first node (191); second switch (SW2) selectively connects the ground potential (GND) to the third node (193); third switch (SW3) selectively connects the first node (191) and the fourth node (194); fourth switch (SW4) selectively connects the third node (193) and the sixth node (196); fifth switch (SW5) selectively connects the second node (192) and the fifth node (195); sixth switch (SW6) selectively connects the second node (192) and the fourth node (194); the positive power supply voltage (+Vcc) is created at the fourth node (194); the negative power supply voltage (−
Vcc) is created at the sixth node (196). - View Dependent Claims (23, 24, 25, 26)
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27. A semiconductor integrated circuit charge pump unit supplied with a positive operating voltage (+Vop) and a ground potential (GND) and configured to generate a positive power supply voltage (+Vcc) and a negative power supply voltage (−
- Vcc) in response thereto, wherein;
the charge pump unit comprises first through fifth switches (SW1-SW4) and first through sixth nodes (191-196); the first switch (SW1) selectively connects the positive operating voltage (+Vop) to the first node (191); the second switch (SW2) selectively connects a ground potential (GND) to the third node (193); the third switch (SW3) selectively connects the first node (191) and the fourth node (194); the fourth switch (SW4) selectively connects the third node (193) and the sixth node (196); fifth switch (SW5) selectively connects the second node (192) and the fifth node (195); sixth switch (SW6) selectively connects the second node (192) and the fourth node (194); the positive power supply voltage (+Vcc) is formed at the fourth node (194); the negative power supply voltage (−
Vcc) is formed at the sixth node (196); andthe fifth node (195) is connected to the ground potential (GND).
- Vcc) in response thereto, wherein;
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28. A semiconductor integrated circuit electronic volume control unit (20) configured to receive a digital audio signal (B) and a digital control signal (D1), and output a digital audio amplified signal (E) in response thereto, the electronic volume control unit comprising:
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a volume control signal generating circuit (21) configured to receive the digital control signal (D1) and, in response thereto, output an amplitude control digital signal (C) and a gain control digital signal (F); an amplitude control electronic volume unit (22) configured to receive the digital audio signal (B) and, in response to the amplitude control digital signal (C), output a digital audio output signal (D2); and a digital amplifier gain control circuit (23) configured to receive the digital audio output signal (D2) and output said digital audio amplified signal (E) in response thereto; wherein; the digital amplifier gain control circuit (23) comprises a variable attenuator (232) having a plurality of resistors coupled in series and a plurality of bypass switches coupled in series, each bypass switch connected in parallel across a corresponding resistor; and an on/off state of each of the plurality of bypass switches is controlled by the gain control digital signal (F) supplied from the volume control signal generating circuit (21).
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Specification