DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
First Claim
1. A method of manufacturing a display device, comprising the steps of:
- forming source/drain electrodes of a thin-film transistor on a substrate, while forming a pixel electrode connected to the source/drain electrodes;
forming an insulating partition wall layer on the substrate, where the partition wall layer has a first opening extending to between the source electrode and the drain electrode; and
forming a channel-region semiconductor layer by depositing a semiconductor layer over the partition wall layer, whereinthe channel-region semiconductor layer is on the bottom of the first opening to be separate from a upper part of the partition wall layer.
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Abstract
A method of forming a display device including source/drain electrodes on a substrate, a pixel electrode, an insulating partition wall layer, a channel-region semiconductor layer. Source/drain electrodes of a thin-film transistor are formed on the substrate, while a pixel electrode is connected to the source/drain electrodes. The insulating partition wall layer is formed on the substrate, where the partition wall layer has a first opening extending to between the source electrode and the drain electrode. Furthermore, a channel-region semiconductor layer is formed by depositing a semiconductor layer over the partition wall layer. The channel-region semiconductor layer is on the bottom of the first opening to be separate from a upper part of the partition wall layer.
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Citations
4 Claims
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1. A method of manufacturing a display device, comprising the steps of:
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forming source/drain electrodes of a thin-film transistor on a substrate, while forming a pixel electrode connected to the source/drain electrodes; forming an insulating partition wall layer on the substrate, where the partition wall layer has a first opening extending to between the source electrode and the drain electrode; and forming a channel-region semiconductor layer by depositing a semiconductor layer over the partition wall layer, wherein the channel-region semiconductor layer is on the bottom of the first opening to be separate from a upper part of the partition wall layer. - View Dependent Claims (2, 3, 4)
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Specification