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DYNAMIC PROTOCOL FOR COMMUNICATING COMMAND AND ADDRESS INFORMATION

  • US 20120191943A1
  • Filed: 08/29/2010
  • Published: 07/26/2012
  • Est. Priority Date: 10/13/2009
  • Status: Abandoned Application
First Claim
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1. A memory device, comprising:

  • a memory core including a plurality of memory cells; and

    an interface circuit to receive a memory operation command that specifies a memory operation pertaining to an access of the memory core, wherein the memory operation command is specified in a packet that includes the memory operation command multiplexed with address information corresponding to the access; and

    wherein a framing position marking the start of the packet is adjusted based at least on one prior received packet, received by the interface circuit.

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