PROBE CARD WIRING STRUCTURE
First Claim
1. A probe card, comprising:
- a space transformer having first power/ground lines and first signal lines embedded therein, wherein the first power/ground and signal lines are configured to have a first wiring pitch on a first surface and a second wiring pitch on a second surface, the second wiring pitch being substantially less than the first wiring pitch;
a printed circuit board configured bonded to the first surface of the space transformer, wherein the printed circuit board includes second power/ground lines and second signal lines embedded in the printed circuit board and coupled to the first power/ground and signal lines; and
conductive lines configured to a surface of the printed circuit board remote to the first surface of the space transformer, wherein each of the conductive lines includes a first end coupled to one of the second signal lines and a second end coupled to a different location of the printed circuit board.
1 Assignment
0 Petitions
Accused Products
Abstract
The present disclosure provides a probe card for wafer level testing. The probe card includes a space transformer having first power/ground lines and first signal lines embedded therein, wherein the first power/ground and signal lines are configured to have a first wiring pitch on a first surface and a second wiring pitch on a second surface, the second wiring pitch being substantially less than the first wiring pitch; a printed circuit board bonded to the first surface of the space transformer, wherein the printed circuit board includes second power/ground lines and second signal lines embedded in the printed circuit board and coupled to the first power/ground and signal lines; and conductive lines configured to a surface of the printed circuit board remote to the first surface of the space transformer, wherein each of the conductive lines includes a first end coupled to one of the second signal lines and a second end coupled to a different location of the printed circuit board.
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Citations
20 Claims
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1. A probe card, comprising:
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a space transformer having first power/ground lines and first signal lines embedded therein, wherein the first power/ground and signal lines are configured to have a first wiring pitch on a first surface and a second wiring pitch on a second surface, the second wiring pitch being substantially less than the first wiring pitch; a printed circuit board configured bonded to the first surface of the space transformer, wherein the printed circuit board includes second power/ground lines and second signal lines embedded in the printed circuit board and coupled to the first power/ground and signal lines; and conductive lines configured to a surface of the printed circuit board remote to the first surface of the space transformer, wherein each of the conductive lines includes a first end coupled to one of the second signal lines and a second end coupled to a different location of the printed circuit board. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A wafer test system, comprising:
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a probe card designed to test a wafer including; a space transformer having first power/ground lines and first signal lines embedded therein, a printed circuit board bonded to the space transformer and embedded with second power/ground lines and second signal lines that are coupled to the first power/ground lines and signal lines, respectively, and conductive lines each having two ends attached to a surface of the printed circuit board remote to the space transformer; a wafer prober designed to hold the wafer to be tested and control the probe card for wafer testing; and a tester coupled to the probe card through a connection cable. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17)
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18. A method of making a probe card, comprising:
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bonding a space transformer to a printed circuit board having signal lines embedded therein; and forming conductive lines on the printed circuit board, wherein each of the conductive lines has a first end bonded to one of the signal lines and a second end bonded to a different region of the printed circuit board, wherein the signal lines are configured in a standard design for multiple types of wafers and the conductive lines are configured specific to a certain type of wafer. - View Dependent Claims (19, 20)
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Specification