NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
First Claim
1. A nonvolatile semiconductor memory device, comprising:
- a memory cell array including a plurality of memory cells; and
a control circuit configured to control a voltage applied to the plurality of memory cells,the control circuit being configured to provide to the memory cells a threshold voltage distribution which is at least partly negative thereby erasing retained data of the memory cells, and to provide to the memory cells plural types of positive threshold voltage distributions thereby writing plural types of data to the memory cells,the control circuit being configured to, in a write operation on the memory cells, execute;
a first write operation for providing plural types of positive threshold voltage distributions to a write-object first memory cell;
a first write verify operation for verifying whether the positive plural types of threshold voltage distributions have been obtained in the first memory cell or not;
a second write operation for providing a first threshold voltage distribution to a second memory cell adjacent to the first memory cell;
the first threshold voltage distribution being a lowest threshold voltage distribution among the plural types of positive threshold voltage distributions; and
a second write verify operation for verifying whether the first threshold voltage distribution or a threshold voltage distribution having a voltage level larger than the first threshold voltage distribution has been obtained in the second memory cell or not,and output results of the first write verify operation and the second write verify operation.
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Accused Products
Abstract
In writing, a first write operation to a first memory cell is executed; and a second write operation for providing a first threshold-voltage distribution to a second memory cell adjacent to the first one, is executed. The first threshold voltage distribution is a lowest threshold-voltage distribution among the positive threshold voltage distributions. It is verified whether a desired threshold voltage distribution has been obtained in the first memory cell or not (first write verify operation), moreover, it is verified whether a first threshold voltage distribution or a threshold voltage distribution having a voltage level larger than the first threshold-voltage distribution has been obtained in the second memory cell or not (second write verify operation). A control circuit outputs results of the first write verify operation and the second write verify operation.
27 Citations
19 Claims
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1. A nonvolatile semiconductor memory device, comprising:
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a memory cell array including a plurality of memory cells; and a control circuit configured to control a voltage applied to the plurality of memory cells, the control circuit being configured to provide to the memory cells a threshold voltage distribution which is at least partly negative thereby erasing retained data of the memory cells, and to provide to the memory cells plural types of positive threshold voltage distributions thereby writing plural types of data to the memory cells, the control circuit being configured to, in a write operation on the memory cells, execute; a first write operation for providing plural types of positive threshold voltage distributions to a write-object first memory cell; a first write verify operation for verifying whether the positive plural types of threshold voltage distributions have been obtained in the first memory cell or not; a second write operation for providing a first threshold voltage distribution to a second memory cell adjacent to the first memory cell;
the first threshold voltage distribution being a lowest threshold voltage distribution among the plural types of positive threshold voltage distributions; anda second write verify operation for verifying whether the first threshold voltage distribution or a threshold voltage distribution having a voltage level larger than the first threshold voltage distribution has been obtained in the second memory cell or not, and output results of the first write verify operation and the second write verify operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A nonvolatile semiconductor memory device, comprising:
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a memory cell array configured as an arrangement of memory strings each including a plurality of memory cells aligned in a stacking direction and connected to each other in series; and a control circuit configured to control a voltage applied to the plurality of memory cells, the control circuit being configured to provide to the memory cells a threshold voltage distribution which is at least partly negative thereby erasing retained data of the memory cells, and to provide to the memory cells plural types of positive threshold voltage distributions thereby writing plural types of data to the memory cells, the control circuit being configured to, in a write operation on the memory cells, execute a first write operation for providing plural types of positive threshold voltage distributions to a write-object first memory cell in the memory string; a first write verify operation for verifying whether the positive plural types of threshold voltage distributions have been obtained in the first memory cell or not; a second write operation for providing a first threshold voltage distribution to a second memory cell adjacent to the first memory cell in the memory string, the first threshold voltage distribution being a lowest threshold voltage distribution among the positive plural types of threshold voltage distributions; and a second write verify operation for verifying whether the first threshold voltage distribution or a threshold voltage distribution having a voltage level larger than the first threshold voltage distribution has been obtained in the second memory cell or not, and output results of the first write verify operation and the second write verify operation. - View Dependent Claims (12, 13, 14, 15)
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16. A method of write in a nonvolatile semiconductor memory device, the nonvolatile semiconductor memory device comprising a memory cell array that includes a plurality of memory cells,
wherein each of the memory cells comprises a charge storage film for storing a charge and is configured capable of retaining plural types of threshold voltage distributions according to an amount of charge stored, and wherein each of the memory cells is configured to be provided with a threshold voltage distribution which is at least partly negative and thereby retain data of an erased state, and to be provided with plural types of positive threshold voltage distributions and thereby be written with plural types of data, the method comprising: -
executing a first write operation for providing the plural types of positive threshold voltage distributions to a write-object first memory cell; executing a first write verify operation for verifying whether the plural types of positive threshold voltage distributions have been obtained in the first memory cell or not; executing a second write operation for providing a first threshold voltage distribution to a second memory cell adjacent to the first memory cell, irrespective of what kind of data is to be written to the second memory cell, the first threshold voltage distribution being a lowest threshold voltage distribution among the plural types of positive threshold voltage distributions; executing a second write verify operation for verifying whether the first threshold voltage distribution or a threshold voltage distribution having a voltage level larger than the first threshold voltage distribution has been obtained in the second memory cell or not; and outputting results of the first write verify operation and the second write verify operation. - View Dependent Claims (17, 18, 19)
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Specification