METHOD FOR FABRICATING SEMICONDUCTOR LIGHTING CHIP

• US 20120196391A1
• Filed: 09/13/2011
• Published: 08/02/2012
• Est. Priority Date: 01/28/2011
• Status: Abandoned Application

• Current Assignee: Advanced Optoelectronic Technology, Inc.
• Original Assignee: Advanced Optoelectronic Technology, Inc.
• Inventors: TU, PO-MIN, HUANG, SHIH-CHENG, LIN, YA-WEN
• Application Number:
  US13/231,715
• Publication Number:
  US 20120196391A1
• Time in Patent Office: Days
• US Class Current: 438/22
• CPC Class Codes: B82Y 40/00 Manufacture or treatment of nanostructures
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/18 within the light emitting region
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/32 containing nitrogen

Abstract

A method for fabricating a semiconductor lighting chip includes steps: providing a substrate with an epitaxial layer, the epitaxial layer comprising a first semiconductor layer, a second semiconductor layer and an active layer located between the first semiconductor layer and the second semiconductor layer; dipping the epitaxial layer into an electrolyte to etch surfaces of the epitaxial layer and form a number of holes on the epitaxial layer; and forming electrodes on the epitaxial layer.

Claims

1. A method for fabricating a semiconductor lighting chip, comprising steps:

providing a substrate with an epitaxial layer, the epitaxial layer comprising a first semiconductor layer, a second semiconductor layer and an active layer located between the first semiconductor layer and the second semiconductor layer;

dipping the epitaxial layer into an electrolyte to etch surfaces of the epitaxial layer and form a number of holes on the epitaxial layer; and

forming electrodes on the epitaxial layer.

2. The method for fabricating a semiconductor lighting chip of claim 1, wherein the electrolyte is made of oxalic acid.

3. The method for fabricating a semiconductor lighting chip of claim 2, wherein the epitaxial layer is made of GaN.

4. The method for fabricating a semiconductor lighting chip of claim 1, wherein before dipping the epitaxial layer into the electrolyte, a plurality of grooves are formed on the second semiconductor layer to expose part of the first semiconductor layer.

5. The method for fabricating a semiconductor lighting chip of claim 4, wherein after the forming of the grooves, a cladding layer is formed to cover the surface of the first semiconductor layer exposing to external environment.

6. The method for fabricating a semiconductor lighting chip of claim 5, wherein the cladding layer is made of SiO₂.

7. The method for fabricating a semiconductor lighting chip of claim 5, wherein after the epitaxial layer is etched by the electrolyte, the cladding layer is removed and the electrodes are formed on the first semiconductor layer and the second semiconductor layer.

8. The method for fabricating a semiconductor lighting chip of claim 1, wherein the epitaxial layer is secured by a fixture and dipped into the electrolyte.

9. The method for fabricating a semiconductor lighting chip of claim 8, wherein the fixture comprises a first clamping section and a second clamping section, the first clamping section contacts an upper surface of the second semiconductor layer, and the second clamping section contacts an bottom surface of the substrate.

10. The method for fabricating a semiconductor lighting chip of claim 9, wherein the first clamping section acts as an anode.

11. The method for fabricating a semiconductor lighting chip of claim 10, wherein a conductive bar acts as a cathode, a voltage is applied between the first clamping section and the conductive bar for driving a current pass through the electrolyte.

12. The method for fabricating a semiconductor lighting chip of claim 11, wherein the voltage is between 10V and 20V.

13. The method for fabricating a semiconductor lighting chip of claim 1, wherein a buffer layer is formed between the substrate and the epitaxial layer.

14. The method for fabricating a semiconductor lighting chip of claim 1, wherein a diameter of the holes are between 1 nm and 100 nm.

15. A method for fabricating a semiconductor lighting chip, comprising steps:

providing a substrate with an epitaxial layer formed thereon;

providing a fixture to cover a top surface of the epitaxial layer;

etching the epitaxial layer in an electrolyte to form a plurality of holes in lateral surfaces of the epitaxial layer; and

forming electrodes on the epitaxial layer.

16. The method of claim 15, further comprising forming a plurality of grooves in the epitaxial layer before etching the epitaxial layer.

17. The method of claim 16, wherein the epitaxial layer comprises a first semiconductor layer, an active layer, and a second semiconductor layer on the substrate in sequence, and the grooves extend through the active layer and a second semiconductor layer.

18. The method of claim 16, further comprising forming a cladding layer in the grooves before etching the epitaxial layer.