CONTROL ARRANGEMENTS AND METHODS FOR ACCESSING BLOCK ORIENTED NONVOLATILE MEMORY

• US 20120198128A1
• Filed: 02/02/2011
• Published: 08/02/2012
• Est. Priority Date: 02/02/2011
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Van Aken, Stephen P.
• Granted Patent: US 8,626,989 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1028 Power efficiency
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7205 Cleaning, compaction, garbage collection, erase control
• CPC Class Codes: G06F 2212/7206 Reconfiguration of flash memory system
• CPC Class Codes: G06F 2212/7207 management of metadata or control data
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A read/write arrangement is described for use in accessing at least one nonvolatile memory device in read/write operations with the memory device being made up of a plurality of memory cells which memory cells are organized as a set of pages that are physically and sequentially addressable with each page having a page length such that a page boundary is defined between successive ones of the pages in the set. The read/write arrangement includes a control arrangement that is configured to store and access a group of data blocks that is associated with a given write operation in a successive series of pages of the memory such that at least an initial page in the series is filled and each block includes a block length that is different than the page length.

Claims

1. A read/write arrangement for use in accessing at least one nonvolatile memory device in read/write operations with said memory device being made up of a plurality of memory cells which memory cells are organized as a set of pages that are physically and sequentially addressable with each page having a page length such that a page boundary is defined between successive ones of the pages in said set, said read/write arrangement comprising:

a control arrangement configured to store and access a group of data blocks that is associated with a given write operation in a successive series of said pages such that at least an initial page in the series is filled and each block of said group includes a block length that is different than said page length.

2. The read/write arrangement of claim 1 wherein said control arrangement is configured to store at least one of said blocks at an offset from any page boundary.

3. The read/write arrangement of claim 1 wherein said series of pages includes an initial group of two or more pages and a final page and said control arrangement is configured to fill at least each page of the initial group of pages based on the group of data blocks.

4. The read/write arrangement of claim 3 wherein said control arrangement is configured to store at least a particular page in the initial group of pages such that the particular page includes at least a final portion of a first data block and at least an initial portion of a second data block such that the particular page contains a boundary between the first data block and the second data block.

5. The read/write arrangement of claim 4 wherein said control arrangement is configured to establish an offset of the second data block in the particular page.

6. The read/write arrangement of claim 4 wherein said control arrangement is configured to store a particular block in said group of data blocks such that a first portion of the particular block is stored in a first page and a second portion of the particular block is stored in a second page such that storage of the particular block crosses a page boundary between the first page and the second page.

7. The read/write arrangement of claim 5 wherein said read/write arrangement is configured to maintain a translation layer at least for said nonvolatile memory and for designating said offset in the translation layer.

8. The read/write arrangement of claim 7 including a table for maintaining said translation layer therein.

9. A memory system including the read/write arrangement of claim 1 and further comprising a module which includes the nonvolatile memory device and a controller in data communication with the module.

10. The memory system of claim 9 wherein said module is configured to maintain a translation layer at least for said nonvolatile memory and to designate said offset in the translation layer.

11. The memory system of claim 9 wherein the translation layer is limited to address translations relating to the nonvolatile memory of said module.

12. The memory system of claim 9 wherein the translation layer is directed by the controller with the controller providing at least one of a parameter and a command to the module.

13. The read/write arrangement of claim 1 wherein said memory device includes NAND flash memory.

14. The read/write arrangement of claim 1 including a garbage collection function for identifying the successive series of pages for storing the group of data blocks.

15. A method for accessing at least one non-volatile memory device in read/write operations with said memory device being made up of a plurality of memory cells which memory cells are organized as a set of pages that are physically and sequentially addressable with each page having a page length such that a page boundary is defined between successive ones of the pages in said set, said method comprising:

storing and accessing a group of data blocks that is associated with a given write operation in a successive series of said pages such that at least an initial page in the series is filled and each block of said group includes a block length that is different than said page length.

16. The method of claim 15 including configuring said control arrangement to store at least one of said blocks at an offset from any page boundary.

17. The method of claim 15 wherein said series of pages includes an initial group of two or more pages and a final page and filling at least each page of the initial group of pages based on the group of data blocks.

18. The method of claim 17 including storing at least a particular page in the initial group of pages such that the particular page includes at least a final portion of a first data block and at least an initial portion of a second data block such that the particular page contains a boundary between the first data block and the second data block.

19. The method of claim 18 including establishing an offset of the second data block in the particular page.

20. The method of claim 18 including storing a particular block in said group of data blocks such that a first portion of the particular block is stored in a first page and a second portion of the particular block is stored in a second page such that storage of the particular block crosses a page boundary between the first page and the second page.

21. The method of claim 19 including maintaining a translation layer at least for said nonvolatile memory and designating said offset in the translation layer.

22. The method of claim 21 wherein maintaining includes maintaining said translation layer in a table.

23. The method of claim 21 including providing a module that includes the nonvolatile memory device and a controller in data communication with the module and maintaining said translation layer in the module.

24. The method of claim 23 including maintaining said translation layer in the module.

25. The method of claim 23 including limiting the translation layer to address translations relating to the nonvolatile memory of said module.

26. The method system of claim 23 including directing the translation layer using the controller with the controller providing at least one of a parameter and a command to the module.

27. The method of claim 15 wherein said memory device includes NAND flash memory, and said storing and accessing is based on a set rules for using NAND flash memory.

28. The method of claim 15 including performing a garbage collection function to identify the successive series of pages for storing the group of data blocks.