Methods and Systems for Synchronous Operation of a Processing Device

• US 20120198458A1
• Filed: 11/30/2011
• Published: 08/02/2012
• Est. Priority Date: 12/16/2010
• Status: Abandoned Application

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Hartog, Robert Scott, Taylor, Ralph Clay, Mantor, Michael, Nussbaum, Sebastien, McCrary, Rex, Leather, Mark, McGrath, Kevin, Woller, Thomas, Jayasena, Nuwan S., Rogers, Philip j.
• Application Number:
  US13/307,922
• Publication Number:
  US 20120198458A1
• Time in Patent Office: Days
• US Class Current: 718/102
• CPC Class Codes: G06F 9/4856 resumption being on a different machine, e.g. task migration, virtual machine migration G06F9/5088 takes precedence

Abstract

Embodiments of the present invention provide a method of synchronous operation of a first processing device and a second processing device. The method includes executing a process on the first processing device, responsive to a determination that execution of the process on the first device has reached a serial-parallel boundary, passing an execution thread of the process from the first processing device to the second processing device, and executing the process on the second processing device.

Claims

1. A method of synchronous operation of a first processing device and a second processing device, comprising:

responsive to a determination that execution of a process on the first device has reached a serial-parallel boundary, passing an execution thread of the process from the first processing device to the second processing device; and

executing the process on the second processing device.

2. The method of claim 1, further comprising:

determining that execution of the process has reached the serial-parallel boundary.

3. The method of claim 1, wherein the first processing device is a central processing unit.

4. The method of claim 1, wherein the first processing device is an accelerated processing device.

5. The method of claim 1, further comprising:

stalling the first processing device.

6. The method of claim 1, further comprising:

context switching the first processing device from the process to another process.

7. The method of claim 1, further comprising:

determining that execution of the process on the second device has reached a serial-parallel boundary.

8. The method of claim 7, further comprising:

passing the execution thread of the process from the second processing device to the first processing device.

9. The method of claim 1, wherein the first and second processing devices are implemented on the same die.

10. The method of claim 1, wherein one of the first and second processors comprises a processor that is more adept at processing serial processing as compared to the other of the first and second processors.

11. A processing system, comprising:

a first processing device configured to execute a process and to, responsive to a determination that execution of a process on the first device has reached a serial-parallel boundary, pass an execution thread of the process to a second processing device;

the second processing device, wherein the second processing device is configured to execute the process.

12. The processing system of claim 11, wherein the first processing device is a central processing unit.

13. The processing system of claim 11, wherein the first processing device is an accelerated processing device.

14. The processing system of claim 11, wherein the first processing device and second processing device are implemented on the same die.

15. The processing system of claim 11, wherein the first processing device is configured to stall after passing the execution thread to the second processing device.

16. The processing device of claim 11, wherein the first processing device is configured to determine that execution of the process has reached the serial-parallel boundary.

17. The processing system of claim 11, wherein the second processing device is configured to pass the execution thread of the process to the first processing device responsive to a determination that execution of a process on the first device has reached a serial-parallel boundary.

18. The processing system of claim 11, wherein one of the first and second processing devices comprises a processor that is more adept at processing serial processing as compared to the other of the first and second processing devices.

19. A method of synchronous operation of first and second processing devices comprising:

executing a first portion of a process on the first processing device, said first portion of the process comprising one of;

a serial portion of commands or a parallel portion of commands;

responsive to a determination that the execution of the process has reached a serial-parallel boundary defined by said first portion of the process and a subsequent second portion of the process, executing the second portion of the process on the second processing device.