SEMICONDUCTOR DEVICE HAVING FIELD PLATE ELECTRODE AND METHOD FOR MANUFACTURING THE SAME

• US 20120199899A1
• Filed: 09/15/2011
• Published: 08/09/2012
• Est. Priority Date: 02/09/2011
• Status: Abandoned Application

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kobayashi, Hitoshi, Tomita, Shigeki
• Application Number:
  US13/233,981
• Publication Number:
  US 20120199899A1
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

According to one embodiment, in a semiconductor device, a first semiconductor layer of a first conductivity type has a first impurity concentration. A second semiconductor layer of the first conductivity type is formed on the first semiconductor layer and has a second impurity concentration lower than the first impurity concentration. A field plate electrode is formed in a lower portion of a trench formed in the second semiconductor layer through a first insulating film so as to bury the lower portion of the trench. A second insulating film is formed in the upper portion of the trench so as to be in contact with the top surface of the field plate electrode. A gate electrode is formed in the upper portion of the trench through a gate insulating film so as to bury the upper portion of the trench to sandwich the second insulating film.

Claims

1. A semiconductor device, comprising:

a first semiconductor layer of a first conductivity type having a first impurity concentration;

a second semiconductor layer of the first conductivity type formed on the first semiconductor layer and having a second impurity concentration lower than the first impurity concentration;

a field plate electrode formed in a lower portion of a trench formed in the second semiconductor layer on a bottom surface side of the trench through a first insulating film so as to bury the lower portion of the trench;

a second insulating film formed in the upper portion of the trench so as to be in contact with the top surface of the field plate electrode;

a gate electrode formed in the upper portion of the trench on an opening side of the trench through a gate insulating film so as to bury the upper portion of the trench to sandwich the second insulating film;

,

a base layer of a second conductivity type formed in the upper portion of the second semiconductor layer and having a third impurity concentration; and

a source layer of the first conductivity type formed in the upper portion of the base layer and having a fourth impurity concentration higher than the second impurity concentration.

2. The semiconductor device according to claim 1, wherein the second insulating film is a thermal oxide film of the field plate electrode.

3. The semiconductor device according to claim 1, wherein the width of the second insulating film is larger than the width of the field plate electrode.

4. The semiconductor device according to claim 1, wherein the impurity concentration of the second insulating film is lower than the impurity concentration of the field plate electrode.

5. The semiconductor device according to claim 1, wherein the top surface of the first insulating film is in contact with the bottom surface of the gate electrode.

6. The semiconductor device according to claim 1, wherein the top surface of the second insulating film is substantially flush with the top surface of the second semiconductor layer.

7. The semiconductor device according to claim 1, wherein the interface between the second insulating film and the field plate electrode is in the bottom surface side of the trench from the top surface of the first insulating film.

8. The semiconductor device according to claim 1, wherein the field plate electrode is electrically connected to the source layer.

9. The semiconductor device according to claim 1, wherein a capacitance between the gate electrode and the field plate electrode is smaller than a capacitance between the gate electrode and the base layer.

10. The semiconductor device according to claim 1, further comprising:

a third semiconductor layer of the second conductivity type formed in the central portion of the source layer so as to reach the base layer through the source layer, the third semiconductor layer having a fourth impurity concentration larger than the third impurity concentration.

11. The semiconductor device according to claim 10, wherein a third semiconductor layer discharges a carrier generated in the second semiconductor layer when p-n junction between the base layer and the second semiconductor layer breaks down.

12. A method for manufacturing a semiconductor device, comprising:

forming a second semiconductor layer of a first conductivity type having a second impurity concentration on a first semiconductor layer of the first conductivity type having a first impurity concentration, the second impurity concentration being lower than the first impurity concentration;

forming a trench in the second semiconductor layer;

forming a first conductive film in the trench through a first insulating film so as to bury the trench;

removing the first insulating film of the upper portion of the trench on an opening side of the trench so as to expose the upper portion of the trench and the upper portion of the first conductive film;

oxidizing the side surface of the upper portion of the exposed trench and the upper portion of the exposed first conductive film so as to form a gate insulating film on the side surface of the upper portion of the trench and modify the entire upper portion of the first conductive film into a second insulating film;

forming a gate electrode in the upper portion of the trench through the gate insulating film so as to bury the upper portion of the trench to sandwich the second insulating film;

forming a base layer having a third impurity concentration on the upper portion of the second semiconductor layer; and

forming a source layer of the first conductivity type having a fourth impurity concentration higher than the second impurity concentration on the upper portion of the base layer.

13. The method for manufacturing the semiconductor device according to claim 12, wherein the gate insulating film of the target thickness is obtained simultaneously with or after the oxidation of the entire upper portion of the first conductive film.

14. The method for manufacturing the semiconductor device according to claim 12, wherein the side surface of the upper portion of the exposed trench and the upper portion of the exposed first conductive film are thermally oxidized by low-temperature hydrogen burning oxidation.

15. The method for manufacturing the semiconductor device according to claim 14, wherein low-temperature hydrogen burning oxidation is performed at a temperature of about 800°

C. to about 900°

C.

16. The method for manufacturing the semiconductor device according to claim 14, wherein a ratio of an oxidation rate of the first conductive film to an oxidation rate of the second semiconductor layer is 4 or more.

17. The method for manufacturing the semiconductor device according to claim 12, wherein the side surface of the upper portion of the exposed trench and the upper portion of the exposed first conductive film are thermally oxidized by steam oxidation.

18. The method for manufacturing the semiconductor device according to claim 12, further comprising:

forming a third semiconductor layer of the second conductivity type having a fourth impurity concentration larger than the third impurity concentration so as to reach the base layer through the source layer.