CHARGE PUMP AND ACTIVE FILTER FOR A FEEDBACK CIRCUIT
First Claim
1. A circuit comprising:
- a first charge pump comprising a first pair of switches and a first pair of resistors, a junction of the resistors in the first pair of resistors forming a first node, wherein the first charge pump is operable to source a first current to the first node or to sink the first current from the first node by operation of the first pair of switches;
a second charge pump comprising a second pair of switches and a second pair of resistors, a junction of the resistors in the second pair of resistors forming a second node, wherein the second charge pump is operable to source a second current to the second node or to sink the second current from the second node by operation of the second pair of switches; and
a filter comprising an impedance and a first capacitor coupled in series between a third node and a fourth node of the filter, wherein a junction of the impedance and the capacitor forms a fifth node of the filter, wherein the first node is coupled to the third node and the second node is coupled to the fifth node.
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Abstract
A circuit containing a pair of charge pumps and an active filter receives outputs of a phase frequency detector used in a phase locked loop. The charge pump is implemented using switches and resistors to reduce performance variations due to component mismatches. The loop filter includes a resistor and a capacitor coupled in series, the resistor and the capacitor determining a zero of the transfer function of the loop filter. The charge pump circuit simultaneously injects a first current pulse at a first node of the loop filter and a second current pulse at a second node formed by a junction of the resistor and the capacitor. The polarity of the first current pulse is the opposite of the polarity of the second current pulse. Multiplication of the capacitance of the capacitor is thereby achieved, enabling implementation of the loop filter in integrated circuit form.
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Citations
11 Claims
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1. A circuit comprising:
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a first charge pump comprising a first pair of switches and a first pair of resistors, a junction of the resistors in the first pair of resistors forming a first node, wherein the first charge pump is operable to source a first current to the first node or to sink the first current from the first node by operation of the first pair of switches; a second charge pump comprising a second pair of switches and a second pair of resistors, a junction of the resistors in the second pair of resistors forming a second node, wherein the second charge pump is operable to source a second current to the second node or to sink the second current from the second node by operation of the second pair of switches; and a filter comprising an impedance and a first capacitor coupled in series between a third node and a fourth node of the filter, wherein a junction of the impedance and the capacitor forms a fifth node of the filter, wherein the first node is coupled to the third node and the second node is coupled to the fifth node. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A phase locked loop (PLL) in integrated circuit (IC) form, the PLL comprising:
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a phase frequency detector (PFD) coupled to receive an input clock and a local clock as inputs, the PFD to generate a pair of error signals comprising a first error signal and a second error signal, wherein the pulse widths of the first error signal and the second error signal are proportional respectively to the extent of lead or lag between the input signal and the output signal; a charge pump circuit to receive the first error signal and the second error signal, and to generate corresponding current pulses, a loop filter to perform low-pass filtering of the current pulses to generate a low-pass filtered signal; a voltage controlled oscillator (VCO) coupled to receive the low-pass filtered signal and to generate an output clock, the frequency of the output clock being proportional to the voltage level of the low-pass filtered signal; and a frequency divider to divide the frequency of the output clock to generate the local clock, wherein the loop filter comprises a first resistor and a first capacitor coupled in series, the first resistor and the first capacitor determining a zero of the transfer function of the loop filter, wherein the charge pump circuit simultaneously injects a first current pulse at a first node of the loop filter and a second current pulse at a second node of the loop filter, wherein the second node is a junction of the first resistor and the first capacitor, and wherein the polarity of the first current pulse is the opposite of the polarity of the second current pulse. - View Dependent Claims (9, 10, 11)
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Specification