CHIPLET DISPLAY DEVICE WITH SERIAL CONTROL

• US 20120206499A1
• Filed: 02/10/2011
• Published: 08/16/2012
• Est. Priority Date: 02/10/2011
• Status: Active Grant

• Current Assignee: Global OLED Technology LLC (LG Display Co., Ltd.)
• Original Assignee: Global OLED Technology LLC (LG Display Co., Ltd.)
• Inventors: Cok, Ronald S.
• Granted Patent: US 8,803,857 B2
• Time in Patent Office: Days
• US Class Current: 345/690
• CPC Class Codes: G09G 2300/026 Video wall, i.e. juxtaposition of a plurality of screens to create a display screen of bigger dimensions
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0828 forming a digital to analog [D/A] conversion circuit
• CPC Class Codes: G09G 3/3208 organic, e.g. using organic light-emitting diodes [OLED]
• CPC Class Codes: H10K 59/129 Chiplets

Abstract

A digital display apparatus includes an array of light-emitting pixels, each with a first and second electrode, formed on a display substrate. A plurality of chiplets is located on the display substrate, each chiplet including an electrode connection pad, a signal connection pad, and a pixel circuit. The electrode connection pad is connected to one of the first or second electrodes. Each chiplet includes one or more pixel circuits formed in the chiplet and electrically connected to the corresponding electrode and signal connection pads. A digital image signal is provided to the signal connection pad(s) of at least one of the chiplets. Each pixel circuit converts at least one digital image signal value to a continuously valued analog pixel-driving signal that controls the luminance of a pixel. The display provides higher-performance pixel circuits with digital control resulting in improved image quality.

Claims

1. A digital display apparatus, comprising:

(a) a display substrate having a display area on a process side of the display substrate;

(b) an array of pixels formed on the display substrate process side in the display area, each pixel including a first electrode, one or more layers of light-emitting material located over the first electrode, and a second electrode located over the one or more layers of light-emitting material, wherein the pixels emit light in response to a current provided through the first and second electrodes;

(c) a plurality of chiplets located on the process side of the display substrate in the display area, each chiplet including a chiplet substrate separate and distinct from the display substrate, an electrode connection pad, and a signal connection pad formed over the chiplet substrate, the electrode connection pad connected to one of the first or second electrodes and wherein each chiplet includes one or more pixel circuits formed in the chiplet and electrically connected to the corresponding electrode connection pad and the corresponding signal connection pad;

(d) means for providing a digital image signal including one or more digital luminance values to the signal connection pad(s) of at least one of the chiplets; and

(e) wherein each pixel circuit includes a digital luminance value converter circuit for converting at least one digital luminance value to a continuously valued analog pixel-driving signal that controls the luminance of the pixel connected to the at least one electrode connector.

2. The display device and system of claim 1, wherein the digital image signal is a serial signal and each pixel circuit includes one or more store-and-forward circuits having an input and an output.

3. The display device and system of claim 2, wherein the input of a store-and-forward circuit in a first pixel circuit is connected to the output of a second pixel circuit to form a serial shift register.

4. The display device and system of claim 3, wherein the first pixel circuit is in a first chiplet and the second pixel circuit is in a second chiplet different from the first chiplet.

5. The display device of claim 1, wherein the analog pixel driving signal is either a current or a voltage signal.

6. The display device of claim 1, wherein an individual digital luminance value convertor circuit is provided for each pixel.

7. The display device of claim 1, wherein a digital luminance value convertor circuit is provided in each chiplet.

8. The display device of claim 1, wherein the array of pixels is divided into mutually exclusive pixel groups arranged in rows and columns, wherein the pixel circuit includes a passive-matrix control circuit for controlling one or more of the pixel groups.

9. The display device of claim 8, wherein each passive-matrix control circuit includes a separate digital luminance value convertor circuit for driving the pixels in each row or column of one or more of the corresponding pixel groups.

10. The display device of claim 8, further comprising a common circuit in a chiplet and connected to a plurality of pixels formed in a common row or column of one of the pixel groups.

11. The display device of claim 10, further including a plurality of common chiplets and wherein the common circuits are in common chiplets.