MRAM DEVICE AND METHOD OF ASSEMBLING SAME

• US 20120211846A1
• Filed: 12/21/2011
• Published: 08/23/2012
• Est. Priority Date: 02/23/2011
• Status: Active Grant

• Current Assignee: VLSI Technology LLC (SoftBank Group Corp.)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: XU, Xuesong, YAO, Jinzhong, LI, Jun, WANG, Jianhong, YU, Wanming
• Granted Patent: US 8,466,539 B2
• Time in Patent Office: Days
• US Class Current: 257/421
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/92247 the second connecting process involving a wire connector
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01028 Nickel [Ni]
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding

Abstract

A method of assembling a magnetoresistive random access memory (MRAM) device includes providing a substrate having an opening. A tape is applied to a surface of the substrate and a first magnetic shield is placed onto the tape and within the substrate opening. An adhesive is applied between the first magnetic shield and the substrate to attach the first magnetic shield to the substrate. An MRAM die is attached to the first magnetic shield and bond pads of the MRAM die are connected to pads on the substrate with wires. A second magnetic shield is attached to a top surface of the MRAM die. An encapsulating material is dispensed onto the substrate, the MRAM die, the second magnetic shield and part of the first magnetic shield, cured, and then the tape is removed. Solder balls then may be attached to the substrate.

Claims

1. A method of assembling a semiconductor device, comprising the steps of:

providing a substrate having a centrally located opening therein;

applying a tape to a first major surface of the substrate;

placing a first magnetic shield onto the tape and within the substrate opening;

applying an adhesive between the first magnetic shield and the substrate so that the first magnetic shield is attached to the substrate; and

removing the tape.

2. The method of assembling a semiconductor device of claim 1, wherein the substrate comprises a multi-layer printed wiring board.

3. The method of assembling a semiconductor device of claim 1, further comprising curing the adhesive.

4. The method of assembling a semiconductor device of claim 1, wherein the first magnetic shield comprise a Ni/Fe slug.

5. The method of assembling a semiconductor device of claim 1, further comprising:

attaching a semiconductor die to a first major surface of the first magnetic shield, wherein a bottom surface of the die is attached to the first major surface of the first magnetic shield;

attaching a second magnetic shield to a top surface of the semiconductor die; and

dispensing an encapsulating material onto a second major surface, opposite the first major surface, of the substrate such that the encapsulating material covers the semiconductor die and the first and second magnetic shields.

6. The method of assembling a semiconductor device of claim 5, further comprising electrically connecting bond pads of the semiconductor die to corresponding pads on the second major surface of the substrate.

7. The method of assembling a semiconductor device of claim 6, wherein the electrically connecting step comprises connecting the bond pads of the semiconductor die to the substrate pads with wires using a wire bonding process.

8. The method of assembling a semiconductor device of claim 5, further comprising attaching a plurality of solder balls to the first major surface of the substrate to facilitate external electrical communication with the semiconductor die.

9. The method of assembling a semiconductor device of claim 5, wherein the semiconductor die comprises a magnetoresistive random access memory (MRAM) device.

10. A semiconductor device packaged in accordance with the method of claim 5.

11. A semiconductor device, comprising:

a substrate having a centrally located opening therein;

a first magnetic shield disposed within the opening, wherein the first magnetic shield is attached to the substrate via an adhesive material;

a semiconductor die attached to a top surface of the first magnetic shield and electrically coupled to the substrate;

a second magnetic shield attached to a top surface of the semiconductor die; and

an encapsulating material covering a first major surface of the substrate, the semiconductor die, the second magnetic shield, and a portion of the top surface of the first magnetic shield.

12. The semiconductor device of claim 11, wherein the semiconductor die comprises a magnetoresistive random access memory (MRAM) die.

13. The semiconductor device of claim 11, wherein the first and second magnetic shields comprise Ni/Fe slugs.

14. The semiconductor device of claim 11, wherein the encapsulating material comprises epoxy.

15. The semiconductor device of claim 11, wherein the substrate comprises a multi-layered printed wiring board.

16. The semiconductor device of claim 11, further comprising a plurality of solder balls attached to a bottom surface of the substrate, wherein the solder balls facilitate external electrical communication with the die.

17. A method of assembling a magnetoresistive random access memory (MRAM) device, comprising the steps of:

providing a substrate having a centrally located opening therein;

applying a tape to a first major surface of the substrate;

placing a first magnetic shield onto the tape and within the substrate opening;

applying an adhesive between the first magnetic shield and the substrate such that the first magnetic shield is attached to the substrate;

curing the adhesive;

attaching a semiconductor die to a top surface of the first magnetic shield;

electrically connecting bond pads of the MRAM die to corresponding pads on a second major surface, opposite to the first major surface, of the substrate with wires using a wire bonding process;

attaching a second magnetic shield to a top surface of the MRAM die;

dispensing an encapsulating material onto the second major surface of the substrate, the MRAM die, the second magnetic shield and a portion of the top surface of the first magnetic shield;

curing the encapsulating material;

removing the tape; and

attaching solder balls to the first major surface of the substrate.

18. The method of assembling a MRAM device of claim 17, wherein the first and second magnetic shields comprise Ni/Fe slugs.

19. The method of assembling a MRAM device of claim 17, wherein the substrate comprises a multi-layer printed wiring board.

20. The method of assembling a MRAM device of claim 17, wherein the solder balls comprise controlled collapse chip connection (C4) solder balls.