INTERFERENCE RESISTANT LOCAL OSCILLATOR

• US 20120214429A1
• Filed: 04/27/2012
• Published: 08/23/2012
• Est. Priority Date: 12/31/2008
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Goyal, Pankaj, Hull, Christopher
• Granted Patent: US 8,970,314 B2
• Time in Patent Office: Days
• US Class Current: 455/90.2
• CPC Class Codes: H01F 2017/0073 with a special conductive pattern, e.g. flat spiral
• CPC Class Codes: H03B 19/00 Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source transference of modulation from one carrier to another H03D7/00
• CPC Class Codes: H03B 2200/0088 Reduction of noise
• CPC Class Codes: H03B 2202/04 Reduction of undesired oscillations originated from outside noise or interferences, e.g. from parasitic couplings with circuit elements outside the oscillator
• CPC Class Codes: H03B 2202/044 the circuit element belonging to transmitter circuitry
• CPC Class Codes: H03B 5/1212 the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
• CPC Class Codes: H03B 5/1215 the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair
• CPC Class Codes: H03B 5/1228 the amplifier comprising one or more field effect transistors
• CPC Class Codes: H03B 5/1243 the means comprising voltage variable capacitance diodes
• CPC Class Codes: H03B 5/1265 switched capacitors
• CPC Class Codes: H03B 5/1296 the feedback circuit comprising a transformer

Abstract

With some embodiments, a VCO (voltage controlled oscillator) operates at an integer multiple (N) above a desired transmission frequency. In accordance with one embodiment, a chip is provided with a VCO to generate a signal and a frequency dividing circuit to provide a reduced frequency version of the signal to a transmit mixer. The transmit mixer is followed by a power amplifier that is on the same die as the VCO. The power amplifier is to generate an OFDM output transmission.

Claims

1. A planar inductor comprising:

a first terminal and a second terminal;

a first metal loop coupled to the first and second terminals; and

a second metal loop, being symmetrical to the first metal loop, coupled to the first and second terminals,

wherein the first and second terminals are positioned between the first and second metal loops to cancel or resist interference.

2. The planar inductor of claim 1 further comprises a shielding ring around the planar inductor.

3. The planar inductor of claim 1, wherein the first metal loop is positioned on one side of the first and second terminals, and wherein the second metal loop is positioned on another side of the first and second terminals.

4. The planar inductor of claim 1, wherein the first and second metal loops have identical shapes.

5. The planar inductor of claim 1 further comprises:

a third metal loop coupled to the first and second terminals; and

a fourth metal loop, being symmetrical to the third metal loop, coupled to the first and second terminals.

6. The planar inductor of claim 5, wherein the third and fourth metal loops have identical shapes.

7. The planar inductor of claim 1, wherein the first and second terminals are coupled to a varactor of a voltage controlled oscillator (VCO).

8. The planar inductor of claim 7, wherein the VCO comprises a first transistor having a drain terminal coupled to the first terminal, and having a gate terminal coupled to the second terminal.

9. The planar inductor of claim 7, wherein the VCO comprises a second transistor having a drain terminal coupled to the second terminal, and having a gate terminal coupled to the first terminal.

10. The planar inductor of claim 7, wherein the VCO comprises a capacitor bank coupled to the first and second terminals.

11. The planar inductor of claim 7, wherein the VCO is powered by at least two regulators.

12. A system comprising:

a processor; and

a wireless interface communicatively coupled to the processor to communicatively link the processor to a wireless network, the wireless interface comprising;

a local oscillator having a voltage controlled oscillator comprising a planar inductor including;

a first terminal and a second terminal;

a first metal loop coupled to the first and second terminals; and

a second metal loop, being symmetrical to the first loop, coupled to the first and second terminals,

wherein the first and second terminals are positioned between the first and second metal loops to cancel or resist interference.

13. The system of claim 12 further comprises a memory coupled to the processor.

14. The system of claim 12, wherein the wireless interface is coupled to an antenna.

15. The system of claim 12 further comprises a shielding ring around the planar inductor.

16. The system of claim 12, wherein the first and second metal loops have identical shapes.

17. The system of claim 12 further comprises:

a third metal loop coupled to the first and second terminals; and

a fourth metal loop, being symmetrical to the third metal loop, coupled to the first and second terminals.

18. The planar system of claim 17, wherein the third and fourth metal loops have identical shapes.

19. The system of claim 12, wherein the first and second terminals are coupled to a varactor of a voltage controlled oscillator (VCO).

24. The apparatus of claim 18, wherein the VCO comprises a planar inductor including:

a first terminal and a second terminal;

a first metal loop coupled to the first and second terminals; and

a second metal loop, being symmetrical to the first loop, coupled to the first and second terminals,

wherein the first and second terminals are positioned between the first and second metal loops to cancel or resist interference.

25. The apparatus inductor of claim 24 further comprises a shielding ring around the planar inductor.

26. The apparatus of claim 24, wherein the first and second metal loops have identical shapes.

27. The apparatus of claim 24, wherein the first and second terminals are coupled to a varactor of the VCO.

28. The apparatus of claim 24, wherein the VCO comprises a first transistor having a drain terminal coupled to the first terminal, and having a gate terminal coupled to the second terminal.

29. The apparatus of claim 24, wherein the VCO comprises a second transistor having a drain terminal coupled to the second terminal, and having a gate terminal coupled to the first terminal.

30. The apparatus of claim 24, wherein the VCO comprises a capacitor bank coupled to the first and second terminals.

20. An apparatus comprising:

a voltage controlled oscillator (VCO); and

a power delivery circuit including;

a pre-regulator to generate a regulated voltage supply;

a first reference generator to receive the regulated voltage supply and to generate a reference voltage; and

a second regulator to receive the reference voltage and to generate a power supply for the VCO.

21. The apparatus of claim 20, wherein second regulator has a bandwidth which is higher than a modulation bandwidth of a transmitter.

22. The apparatus of claim 20, wherein the first reference generator comprises a bandgap reference generator.

23. The apparatus of claim 20 further comprises a diode-connected transistor coupled to a node providing the reference voltage.