Systems and Methods for Current Sensing

• US 20120218003A1
• Filed: 02/25/2011
• Published: 08/30/2012
• Est. Priority Date: 02/25/2011
• Status: Active Grant

• Current Assignee: pSemi Corporation (Murata Manufacturing Co Limited)
• Original Assignee: Peregrine Semiconductor Corporation (Murata Manufacturing Co Limited)
• Inventors: Olson, Chris
• Granted Patent: US 8,692,609 B2
• Time in Patent Office: Days
• US Class Current: 327/72
• CPC Class Codes: G01R 19/04 Measuring peak values or amplitude or envelope of ac or of pulses
• CPC Class Codes: G11C 13/004 Reading or sensing circuits or methods
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: H03F 2200/462 the current being sensed

Abstract

Systems and methods for current sensing are described. The described systems and methods utilize a comparator for generating a current sense signal based on comparing an output current of a circuit against a reference current. The reference current is generated by using a current sourcing circuit that is connected to a controllable current source.

Claims

1. A method for sensing current, comprising:

generating an output current from a first circuit;

generating a variable reference current by using a current sourcing circuit connected in series with a controllable current source;

coupling into a first input node of a comparator, an output voltage signal that is generated from the first circuit, wherein the output voltage signal varies in accordance with the output current generated by the first circuit;

coupling into a second input node of the comparator, a reference voltage signal that is generated at a reference node located between the current sourcing circuit and the controllable current source; and

adjusting the controllable current source to set the reference voltage signal at a desired voltage level in order to compare the reference voltage signal to the output voltage signal, and generate therefrom, a current sense signal.

2. The method of claim 1, wherein the current sense signal is a monitor signal for indicating a condition of the output current.

3. The method of claim 1, wherein the first circuit comprises at least one cascode stack that includes an upper leg and a lower leg, each of the upper and lower legs including at least one field-effect transistor;

and further wherein the current sourcing circuit comprises a replica circuit that is substantially identical to at least one of the upper leg or the lower leg.

4. The method of claim 3, wherein the current sense signal is a switch control signal for controlling the at least one first field-effect transistor.

5. The method of claim 3, wherein the first circuit comprises “

N”

cascode stacks, and the controllable current source is adjusted to draw through the replica circuit, a reference current having “

1/N”

times the magnitude of the output current generated by the first circuit.

6. The method of claim 3, wherein the replica circuit comprises a duplicate circuit of a lower leg of a first cascode stack.

7. The method of claim 3, wherein the replica circuit comprises a duplicate circuit of an upper leg of a first cascode stack.

8. The method of claim 7, wherein a gate node of at least a first field-effect transistor in the replica circuit is connected to a gate node of a corresponding field-effect transistor in the upper leg of the first cascode stack.

9. The method of claim 1, wherein adjusting the controllable current source to set the reference voltage signal at the desired voltage level comprises:

using a graph wherein the output voltage signal is represented by a first line having a first slope, the first slope indicative of a rate of change in amplitude of the output voltage signal in response to a change in the output current.

10. The method of claim 9, further comprising:

using the graph to identify a point of intersection of the first line with a second line having a second slope, the second line corresponding to the reference voltage signal.

11. The method of claim 10, wherein the second slope is complementary to the first slope and thereby generates the point of intersection.

12. A current sensing system comprising:

a first circuit configured to provide an output current at a first amplitude; and

a control circuit, comprising;

a current sourcing circuit;

a controllable current source operable to set a desired reference current flowing through the current sourcing circuit; and

a comparator having a first input node configured to receive a first output voltage corresponding to the first amplitude of the output current, a second input node configured to receive a reference voltage that corresponds to the desired reference current, and an output node configured to provide a current sense signal.

13. The current sensing system of claim 12, wherein the desired reference current has an amplitude that is an integer sub-multiple of the first amplitude of the output current.

14. The current sensing system of claim 13, wherein the desired reference current is measured in milliamperes and the output current is measured in amperes.

15. The current sensing system of claim 12, wherein the first circuit comprises at least one cascode stack that includes an upper leg and a lower leg, each of the upper and lower legs including at least one field-effect transistor;

and further wherein the current sourcing circuit comprises a replica circuit that is substantially identical to at least one of the upper leg or the lower leg.

16. The current sensing system of claim 15, wherein the current sense signal is a switch control signal for controlling at least a first field-effect transistor in the at least one cascode stack.

17. The current sensing system of claim 15, wherein the replica circuit comprises a reference set of field-effect transistors that replicate an upper leg of a first cascode stack.

18. The current sensing system of claim 17, wherein each gate node of each of the reference set of field-effect transistors is connected to a corresponding gate node of a corresponding field-effect transistor in the upper leg of the first cascode stack.

19. The current sensing system of claim 17, further comprising a first driver circuit coupled to a first gate node of a first reference field-effect transistor and a corresponding gate node in a first field-effect transistor in the upper leg of the first cascode stack, the first driver circuit configured to provide a drive signal operative to simultaneously switch the first reference field-effect transistor and the first field-effect transistor.

20. The current sensing system of claim 12, wherein the first circuit and the control circuit are contained inside an integrated circuit.

21. The current sensing system of claim 20, wherein the controllable current source is adjusted for setting the desired reference current to a value that results in the first amplitude of the first output current staying lower than a maximum current rating of the integrated circuit.

22. The current sensing system of claim 21, wherein the controllable current source is controlled by a control signal provided by a voltage control loop circuit.

23. The current sensing system of claim 22, wherein the voltage control loop circuit is contained inside the integrated circuit.

24. A current sensing system comprising:

a plurality of cells located inside an integrated circuit; and

a unit sense cell, comprising;

a current sourcing circuit;

a controllable current source operable to set a desired reference current flowing through the current sourcing circuit; and

a comparator having a first input node configured to receive a first voltage that varies in accordance with an output current drawn from the plurality of cells, a second input node configured to receive a reference voltage that varies in accordance with the desired reference current, and an output node that provides a current sense signal.

25. The current sensing system of claim 24, wherein the plurality of cells includes at least one cascode stack that includes an upper leg and a lower leg, each of the upper and lower legs including at least one field-effect transistor;

and further wherein the current sourcing circuit comprises a replica circuit that is substantially identical to at least one of the upper leg or the lower leg.

26. The current sensing system of claim 25, wherein the replica circuit and the controllable current source are configured in a series connection that provides the desired reference current.

27. The current sensing system of claim 24, wherein the desired reference current has an amplitude that is smaller than the output current drawn from the plurality of cells by a factor that corresponds to a first number of cells contained in the plurality of cells.

28. The current sensing system of claim 27, wherein the first number of cells is substantially equal to ten thousand.