THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME AND FLAT PANEL DISPLAY DEVICE HAVING THE SAME

• US 20120220077A1
• Filed: 05/02/2012
• Published: 08/30/2012
• Est. Priority Date: 07/08/2008
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Mobile Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: HA, Jae-Heung, SONG, Young-Woo, LEE, Jong-Hyuk, JEONG, Jong-Han, KIM, Min-Kyu, MO, Yeon-Gon, JEONG, Jae-Kyeong, CHUNG, Hyun-Joong, KIM, Kwang-Suk, YANG, Hui-Won, CHOI, Chaun-Gi
• Granted Patent: US 8,728,862 B2
• Time in Patent Office: Days
• US Class Current: 438/104
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A thin film transistor, a method of manufacturing the thin film transistor, and a flat panel display device including the thin film transistor. The thin film transistor includes: a gate electrode formed on a substrate; a gate insulating film formed on the gate electrode; an activation layer formed on the gate insulating film; a passivation layer including a compound semiconductor oxide, formed on the activation layer; and source and drain electrodes that contact the activation layer.

Claims

1. A method of manufacturing a thin film transistor, comprising:

forming a gate electrode on a substrate;

forming a gate insulating film on the gate electrode;

forming an activation layer comprising a compound semiconductor oxide or zinc oxide (ZnO), on the gate insulating film;

forming a passivation layer comprising an inorganic oxide, on the activation layer, the inorganic oxide comprising at least one metal comprised in the activation layer; and

forming source and drain electrodes in contact with the activation layer,

wherein the inorganic oxide comprises gallium (Ga), indium (In), tin (Sn), zirconium (Zr), hafnium (Hf), vanadium (V), or a combination thereof.

2. The method of manufacturing the thin film transistor as claimed in claim 1, wherein the forming of the passivation layer comprises:

forming contact holes in the passivation layer.

3. The method of manufacturing the thin film transistor as claimed in claim 2, wherein the forming of the source and drain electrodes comprises:

forming a conductive layer on the passivation layer and in the contact holes; and

patterning the conductive layer to form the source and drain electrodes, which contact the activation layer through the contact holes.

4. The method of manufacturing the thin film transistor as claimed in claim 1, further comprising annealing the passivation layer.

5. The method of manufacturing the thin film transistor as claimed in claim 1, wherein the activation layer comprises zinc oxide (ZnO).

6. The method of manufacturing the thin film transistor as claimed in claim 5, wherein the activation layer is doped with at least one ion of gallium (Ga), indium (In), tin (Sn), zirconium (Zr), hafnium (Hf), and vanadium (V).

7. The method of manufacturing the thin film transistor as claimed in claim 1, wherein the inorganic oxide comprises elements that are also comprised in the compound semiconductor oxide.

8. The method of manufacturing the thin film transistor as claimed in claim 7, wherein the compound semiconductor oxide comprises gallium (Ga), indium (In), tin (Sn), zirconium (Zr), hafnium (Hf), vanadium (V), or a combination thereof.

9. The method of manufacturing the thin film transistor as claimed in claim 1, wherein the forming of the source and drain electrodes comprises using the passivation layer as an etch stop layer.

10. The method of manufacturing the thin film transistor as claimed in claim 1, further comprising forming a buffer layer on the substrate.