METHOD FOR MANUFACTURING TRANSISTOR

• US 20120223307A1
• Filed: 05/17/2012
• Published: 09/06/2012
• Est. Priority Date: 12/19/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: SAKATA, Junichiro
• Granted Patent: US 8,803,149 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A hydrogen barrier layer is selectively provided over an oxide semiconductor layer including hydrogen and hydrogen is selectively desorbed from a given region in the oxide semiconductor layer by conducting oxidation treatment, so that regions with different conductivities are formed in the oxide semiconductor layer. After that, a channel formation region, a source region, and a drain region can be formed with the use of the regions with different conductivities formed in the oxide semiconductor layer.

Claims

1. A semiconductor device comprising:

an oxide semiconductor layer including a first region and a second region, the first region including a channel region;

a gate insulating layer adjacent to the oxide semiconductor layer;

a gate electrode adjacent to the oxide semiconductor layer with the gate insulating layer interposed therebetween; and

a conductive layer in contact with the second region of the oxide semiconductor layer,

wherein the first region includes hydrogen at a lower concentration than the second region, and

wherein the first region includes oxygen at a higher concentration than the second region.

2. The semiconductor device according to claim 1, further comprising a hydrogen barrier layer over the oxide semiconductor layer.

3. The semiconductor device according to claim 1, further comprising a hydrogen barrier layer selectively over the second region of the oxide semiconductor layer.

4. The semiconductor device according to claim 2, wherein the hydrogen barrier layer comprises a material selected from the group consisting of a silicon nitride, a silicon nitride oxide, a silicon oxide, a silicon oxynitride, an aluminum oxide, an aluminum nitride, an aluminum oxynitride, a titanium oxide, a tantalum oxide, a titanium nitride, and a tantalum nitride.

5. The semiconductor device according to claim 3, wherein the hydrogen barrier layer comprises a material selected from the group consisting of a silicon nitride, a silicon nitride oxide, a silicon oxide, a silicon oxynitride, an aluminum oxide, an aluminum nitride, an aluminum oxynitride, a titanium oxide, a tantalum oxide, a titanium nitride, and a tantalum nitride.

6. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium.

7. The semiconductor device according to claim 1, wherein the gate electrode is located above the oxide semiconductor layer.

8. The semiconductor device according to claim 1, wherein the gate electrode is located below the oxide semiconductor layer.

9. A semiconductor device comprising:

an oxide semiconductor layer including a first region and a second region, the first region including a channel region;

a gate insulating layer adjacent to the oxide semiconductor layer;

a gate electrode adjacent to the oxide semiconductor layer with the gate insulating layer interposed therebetween;

a conductive layer in contact with the second region of the oxide semiconductor layer; and

a pixel electrode in electrical contact with the conductive layer,

wherein the first region includes hydrogen at a lower concentration than the second region, and

wherein the first region includes oxygen at a higher concentration than the second region.

10. The semiconductor device according to claim 9, further comprising a hydrogen barrier layer over the oxide semiconductor layer.

11. The semiconductor device according to claim 9, further comprising a hydrogen barrier layer selectively over the second region of the oxide semiconductor layer.

12. The semiconductor device according to claim 10, wherein the hydrogen barrier layer comprises a material selected from the group consisting of a silicon nitride, a silicon nitride oxide, a silicon oxide, a silicon oxynitride, an aluminum oxide, an aluminum nitride, an aluminum oxynitride, a titanium oxide, a tantalum oxide, a titanium nitride, and a tantalum nitride.

13. The semiconductor device according to claim 11, wherein the hydrogen barrier layer comprises a material selected from the group consisting of a silicon nitride, a silicon nitride oxide, a silicon oxide, a silicon oxynitride, an aluminum oxide, an aluminum nitride, an aluminum oxynitride, a titanium oxide, a tantalum oxide, a titanium nitride, and a tantalum nitride.

14. The semiconductor device according to claim 9, wherein the oxide semiconductor layer comprises indium.

15. The semiconductor device according to claim 9, wherein the gate electrode is located above the oxide semiconductor layer.

16. The semiconductor device according to claim 9, wherein the gate electrode is located below the oxide semiconductor layer.