RETRIEVAL OF ENCODED DATA SLICES AND ENCODED INSTRUCTION SLICES BY A COMPUTING DEVICE

• US 20120226960A1
• Filed: 02/14/2012
• Published: 09/06/2012
• Est. Priority Date: 03/02/2011
• Status: Active Grant

• Current Assignee: Pure Storage, Inc.
• Original Assignee: Cleversafe Incorporated (International Business Machines Corporation)
• Inventors: Grube, Gary W., Markison, Timothy W., Dhuse, Greg, Resch, Jason K., Volvovski, Ilya, Leggette, Wesley
• Granted Patent: US 8,910,022 B2
• Time in Patent Office: Days
• US Class Current: 714/763
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems
• CPC Class Codes: G06F 15/177 Initialisation or configuration control processor initialisation G06F9/4405
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
• CPC Class Codes: H04L 41/0803 Configuration setting
• CPC Class Codes: H04L 41/0853 by actively collecting configuration information or by backing up configuration information
• CPC Class Codes: H04L 41/0856 by backing up or archiving configuration information
• CPC Class Codes: H04L 67/1097 for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]

Abstract

A computing device includes a central processing unit (CPU) and a memory system module. The CPU includes a data dispersed storage error coding (DSEC) module operable to DSEC decode a set of encoded ingress data slices to recapture ingress data and DSEC encode egress data to produce a set of encoded egress data slices, an instruction DSEC module operable to DSEC decode a set of encoded instruction slices to recapture an instruction, and an arithmetic logic unit (ALU) operable to, execute the instruction on the ingress data and execute the instruction to produce the egress data. The memory system module is operable to coordinate retrieval of the set of encoded ingress data slices from memory, coordinate retrieval of the set of encoded instruction slices from the memory, and coordinate storage of the set of encoded egress data slices in the memory.

Claims

1. A computing device comprises:

a central processing unit (CPU) that includes;

a data dispersed storage error coding (DSEC) module operable to;

DSEC decode one or more sets of encoded ingress data slices to recapture ingress data; and

DSEC encode egress data to produce one or more sets of encoded egress data slices;

an instruction DSEC module operable to DSEC decode one or more sets of encoded instruction slices to recapture an instruction;

an arithmetic logic unit (ALU) operable to, at least one of;

execute the instruction on the ingress data; and

execute the instruction to produce the egress data; and

a memory system module operable to;

coordinate retrieval of the one or more sets of encoded ingress data slices from memory;

coordinate retrieval of the one or more sets of encoded instruction slices from the memory; and

coordinate storage of the one or more sets of encoded egress data slices in the memory.

2. The computing device of claim 1 further comprises:

a network interface module operable to;

facilitate the retrieval of the one or more sets of encoded ingress data slices from the memory when the one or more sets of encoded ingress data slices is stored in dispersed storage network (DSN) memory of the memory;

facilitate the retrieval of the one or more sets of encoded instruction slices from the memory when the one or more sets of encoded instruction slices is stored in the DSN memory; and

facilitate the storage of the one or more sets of encoded egress data slices in the memory when the one or more sets of encoded egress data slices is to be stored in the DSN memory. (DSN memory is accessible via LAN, WAN, Internet, personal network)

3. The computing device of claim 1 further comprises:

the data DSEC module operable to issue a read request to the memory system module for retrieval of the one or more sets of encoded ingress data slices;

the memory system module operable to determine whether the one or more sets of encoded ingress data slices are stored in main memory of the computing device or in dispersed storage network (DSN) memory; and

(e.g., already retrieved during a previous DSN memory retrieval)

when the one or more sets of encoded ingress data slices are stored in the DSN memory;

the memory system module operable to issue at least one or more of sets of at least a decode threshold number of read commands to dispersed storage (DS) units of the DSN memory regarding retrieval of the one or more sets of encoded ingress data slices; and

the memory system module operable to provide one or more sets of a least a decode threshold number of encoded data slices received from the DSN memory as the one or more sets of encoded ingress data slices to the data DSEC module.

4. The computing device of claim 3 further comprises:

the memory system module operable to issue a plurality of sets of at least a decode threshold number of read commands to the DS units of the DSN memory regarding retrieval of a plurality of sets of encoded data slices that includes the one or more sets of encoded ingress data slices;

the memory system module operable to coordinate storage of a plurality of sets of a least a decode threshold number of encoded data slices received from the DSN memory in the main memory; and

the memory system module operable to retrieve the one or more sets of encoded ingress data slices from main memory and provide the one or more sets of encoded ingress data slices to the data DSEC module.

5. The computing device of claim 1 further comprises:

the instruction DSEC module operable to issue a read request to the memory system module for retrieval of the one or more sets of encoded instruction slices;

the memory system module operable to determine whether the one or more sets of encoded instruction slices are stored in main memory of the computing device or in dispersed storage network (DSN) memory; and

when the one or more sets of encoded instruction slices are stored in the DSN memory;

the memory system module operable to issue at least one or more of sets of at least a decode threshold number of read commands to dispersed storage (DS) units of the DSN memory regarding retrieval of the one or more sets of encoded instruction slices; and

the memory system module operable to provide one or more sets of a least a decode threshold number of encoded instruction slices received from the DSN memory as the one or more sets of encoded instruction slices to the instruction DSEC module.

6. The computing device of claim 5 further comprises:

the memory system module operable to issue a plurality of sets of at least a decode threshold number of read commands to the DS units of the DSN memory regarding retrieval of a plurality of sets of encoded instruction slices that includes the one or more sets of encoded instruction slices;

the memory system module operable to coordinate storage of a plurality of sets of a least a decode threshold number of encoded instruction slices received from the DSN memory in the main memory; and

the memory system operable to retrieve the one or more sets of encoded instruction slices from main memory and provide the one or more sets of encoded instruction slices to the instruction DSEC module.

7. The computing device of claim 1 further comprises:

the data DSEC module operable to issue a write request to the memory system module for storage of the one or more sets of encoded egress data slices; and

the memory system module operable to coordinate storage of the one or more sets of encoded egress data slices in main memory of the computing device.

8. The computing device of claim 7, wherein the memory system module is further operable to:

determine when to transfer the one or more sets of encoded egress data slices from the main memory to dispersed storage network (DSN) memory;

(e.g., stored a plurality of sets of egress data slices in main memory;

one or more pages of data, etc.)

when the one or more sets of encoded egress data slices is to be transferred from the main memory to the DSN memory;

issue one or more sets of at least a write threshold number of write commands to dispersed storage (DS) units of the DSN memory regarding the one or more sets of encoded egress data slices;

issue one or more sets of at least the write threshold number of write commit commands to the DS units when at least a write threshold number of DS units have confirmed respective ones of the one or more sets of at least the write threshold number of write commands; and

issue one or more sets of at least the write threshold number of write finalize commands to the DS units when at least a write threshold number of DS units have confirmed respective ones of the one or more sets of at least the write threshold number of write commit commands.

9. The computing device of claim 7 further comprises:

an interface for interfacing with a dispersed storage (DS) token module;

the memory system module is further operable to;

determine when to transfer the one or more sets of encoded egress data slices from the main memory to dispersed storage network (DSN) memory; and

(e.g., stored a plurality of sets of egress data slices in main memory;

one or more pages of data, etc.)

when the one or more sets of encoded egress data slices is to be transferred from the main memory to the DSN memory, issue one or more sets of at least a write threshold number of write commands to the DS token module; and

the DS token module is operable to;

convert the one or more sets of at least a write threshold number of write commands into one or more sets of at least the write threshold number of DSN write commands;

issue the one or more sets of at least the write threshold number of DSN write commands to dispersed storage (DS) units of the DSN memory;

issue one or more sets of at least the write threshold number of DSN write commit commands to the DS units when at least a write threshold number of DS units have confirmed respective ones of the one or more sets of at least the write threshold number of DSN write commands; and

issue one or more sets of at least the write threshold number of DSN write finalize commands to the DS units when at least a write threshold number of DS units have confirmed respective ones of the one or more sets of at least the write threshold number of DSN write commit commands.

10. The computing device of claim 1 further comprises:

an interface for interfacing with a dispersed storage (DS) token module;

wherein, when the computing device is paired with the DS token module, the CPU retrieves at least one of;

first DSEC parameters for DSEC decoding the one or more sets of encoded ingress data slices;

second DSEC parameters for DSEC encoding the egress data; and

instruction DSEC parameters for DSEC decoding the one or more sets of encoded instruction slices.

11. The computing device of claim 1 further comprises:

an interface for interfacing with a dispersed storage (DS) token module;

the data DSEC module operable to issue a read request to the memory system module for retrieval of the one or more sets of encoded ingress data slices;

the memory system module operable to determine whether the one or more sets of encoded ingress data slices are stored in main memory of the computing device or in dispersed storage network (DSN) memory;

(e.g., already retrieved during a previous DSN memory retrieval)

when the one or more sets of encoded ingress data slices are stored in the DSN memory, the memory system module operable to issue at least one or more of sets of at least a decode threshold number of read commands to the DS token module regarding retrieval of the one or more sets of encoded ingress data slices; and

the DS token module operable to;

convert the at least one or more of sets of at least the decode threshold number of read commands into at least one or more of sets of at least the decode threshold number of DSN read commands;

issue, via the computing device, the at least one or more of sets of at least the decode threshold number of DSN read commands to dispersed storage (DS) units of the DSN memory;

convert one or more sets of a least a decode threshold number of DSN encoded data slices received from the DSN memory into the one or more sets of encoded ingress data slices; and

provide the one or more sets of encoded ingress data slices to the memory system module;

the memory system module operable to provide the one or more sets of encoded ingress data slices to the data DSEC module.

12. The computing device of claim 11 further comprises:

the memory system module operable to issue a plurality of sets of at least a decode threshold number of read commands to the DSN token module;

the DS token module operable to;

convert the plurality of sets of at least the decode threshold number of read commands into a plurality of sets of at least the decode threshold number of DSN read commands;

issue, via the computing device, the plurality of sets of at least the decode threshold number of DSN read commands to the DS units of the DSN memory;

convert a plurality of sets of a least a decode threshold number of DSN encoded data slices received from the DSN memory into a plurality sets of encoded ingress data slices; and

provide the plurality of sets of encoded ingress data slices to the memory system module;

the memory system module operable to;

provide the one or more sets of encoded ingress data slices of the plurality of sets of encoded ingress data slices to the data DSEC module; and

coordinate storage of remaining sets of the plurality of sets of encoded ingress data slices in the main memory.

13. The computing device of claim 1 further comprises:

an interface for interfacing with a dispersed storage (DS) token module;

the instruction DSEC module operable to issue a read request to the memory system module for retrieval of the one or more sets of encoded instruction slices;

the memory system module operable to determine whether the one or more sets of encoded instruction slices are stored in main memory of the computing device or in dispersed storage network (DSN) memory;

(e.g., already retrieved during a previous DSN memory retrieval)

when the one or more sets of encoded instruction slices are stored in the DSN memory, the memory system module operable to issue at least one or more of sets of at least a decode threshold number of read commands to the DS token module regarding retrieval of the one or more sets of encoded instruction slices; and

the DS token module operable to;

convert the at least one or more of sets of at least the decode threshold number of read commands into at least one or more of sets of at least the decode threshold number of DSN read commands;

issue, via the computing device, the at least one or more of sets of at least the decode threshold number of DSN read commands to dispersed storage (DS) units of the DSN memory;

convert one or more sets of a least a decode threshold number of DSN encoded instruction slices received from the DSN memory into the one or more sets of encoded instruction slices; and

provide the one or more sets of encoded instruction slices to the memory system module;

the memory system module operable to provide the one or more sets of encoded instruction slices to the instruction DSEC module.

14. The computing device of claim 13 further comprises:

the memory system module operable to issue a plurality of sets of at least a decode threshold number of read commands to the DSN token module;

the DS token module operable to;

convert the plurality of sets of at least the decode threshold number of read commands into a plurality of sets of at least the decode threshold number of DSN read commands;

issue, via the computing device, the plurality of sets of at least the decode threshold number of DSN read commands to the DS units of the DSN memory;

convert a plurality of sets of a least a decode threshold number of DSN encoded instruction slices received from the DSN memory into a plurality sets of encoded instruction slices; and

provide the plurality of sets of encoded instruction slices to the memory system module;

the memory system module operable to;

provide the one or more sets of encoded instruction slices of the plurality of sets of encoded instruction slices to the instruction DSEC module; and

coordinate storage of remaining sets of the plurality of sets of encoded instruction slices in the main memory.

15. A module comprises:

a first module operable to;

coordinate retrieval of one or more sets of encoded ingress data slices from memory;

decode the one or more sets of encoded ingress data slices in accordance with data dispersed storage error coding (DSEC) parameters to recapture ingress data;

encode egress data in accordance with the DSEC parameters to produce one or more sets of encoded egress data slices; and

coordinate storage of the one or more sets of encoded egress data slices in the memory; and

a second module operable to;

coordinate retrieval of one or more sets of encoded instruction slices from the memory; and

decode the one or more sets of encoded instruction slices in accordance with the DSEC parameters to recapture an instruction, wherein;

the first module is further operable to provide the ingress data to an arithmetic logic unit (ALU);

the second module is further operable to provide the instruction to the ALU; and

the first module is further operable to receive the egress data from the ALU.

16. The module of claim 15, wherein the DSEC parameters comprises:

ingress data DSEC parameters;

egress data DSEC parameters; and

instruction DSEC parameters.

17. The module of claim 15 further comprises:

the first module operable to determine whether the one or more sets of encoded ingress data slices are stored in main memory of a computing device or in dispersed storage network (DSN) memory;

(e.g., already retrieved during a previous DSN memory retrieval)

when the one or more sets of encoded ingress data slices are stored in the DSN memory, the first module operable to issue at least one or more of sets of at least a decode threshold number of read commands to dispersed storage (DS) units of the DSN memory regarding retrieval of the one or more sets of encoded ingress data slices.

18. The module of claim 17 further comprises:

the first module operable to issue a plurality of sets of at least a decode threshold number of read commands to the DS units of the DSN memory regarding retrieval of a plurality of sets of encoded data slices that includes the one or more sets of encoded ingress data slices; and

the first module operable to coordinate storage of a plurality of sets of a least a decode threshold number of encoded data slices received from the DSN memory in the main memory, wherein the plurality of sets of the at least the decode threshold number of encoded data slices includes the one or more sets of encoded ingress data slices.

19. The module of claim 15 further comprises:

the second module operable to determine whether the one or more sets of encoded instruction slices are stored in main memory of the computing device or in dispersed storage network (DSN) memory;

when the one or more sets of encoded instruction slices are stored in the DSN memory, the second module operable to issue at least one or more of sets of at least a decode threshold number of read commands to dispersed storage (DS) units of the DSN memory regarding retrieval of the one or more sets of encoded instruction slices.

20. The module of claim 19 further comprises:

the second module operable to issue a plurality of sets of at least a decode threshold number of read commands to the DS units of the DSN memory regarding retrieval of a plurality of sets of encoded instruction slices that includes the one or more sets of encoded instruction slices; and

the second module operable to coordinate storage of a plurality of sets of a least a decode threshold number of encoded instruction slices received from the DSN memory in the main memory, wherein the plurality of sets of a least a decode threshold number of encoded instruction slices includes the one or more sets of encoded instruction slices.

21. The module of claim 15 further comprises:

the first module operable to;

coordinate storage of the one or more sets of encoded egress data slices in main memory of a computing device;

determine when to transfer the one or more sets of encoded egress data slices from the main memory to dispersed storage network (DSN) memory; and

(e.g., stored a plurality of sets of egress data slices in main memory;

one or more pages of data, etc.)

when the one or more sets of encoded egress data slices is to be transferred from the main memory to the DSN memory;

issue one or more sets of at least a write threshold number of write commands to dispersed storage (DS) units of the DSN memory regarding the one or more sets of encoded egress data slices;

issue one or more sets of at least the write threshold number of write commit commands to the DS units when at least a write threshold number of DS units have confirmed respective ones of the one or more sets of at least the write threshold number of write commands; and

issue one or more sets of at least the write threshold number of write finalize commands to the DS units when at least a write threshold number of DS units have confirmed respective ones of the one or more sets of at least the write threshold number of write commit commands.

22. The module of claim 15 further comprises:

an interface for interfacing with a dispersed storage (DS) token module;

the first module is further operable to;

determine when to transfer the one or more sets of encoded egress data slices from the main memory to dispersed storage network (DSN) memory;

(e.g., stored a plurality of sets of egress data slices in main memory;

one or more pages of data, etc.)

when the one or more sets of encoded egress data slices is to be transferred from the main memory to the DSN memory, issue one or more sets of at least a write threshold number of write commands to the DS token module;

the DS token module is operable to;

convert the one or more sets of at least a write threshold number of write commands into one or more sets of at least the write threshold number of DSN write commands;

issue the one or more sets of at least the write threshold number of DSN write commands to dispersed storage (DS) units of the DSN memory;

issue one or more sets of at least the write threshold number of DSN write commit commands to the DS units when at least a write threshold number of DS units have confirmed respective ones of the one or more sets of at least the write threshold number of DSN write commands; and

issue one or more sets of at least the write threshold number of DSN write finalize commands to the DS units when at least a write threshold number of DS units have confirmed respective ones of the one or more sets of at least the write threshold number of DSN write commit commands.

23. The module of claim 15 further comprises:

an interface module for interfacing with a dispersed storage (DS) token module;

the first module operable to determine whether the one or more sets of encoded ingress data slices are stored in main memory of a computing device or in dispersed storage network (DSN) memory;

(e.g., already retrieved during a previous DSN memory retrieval)

when the one or more sets of encoded ingress data slices are stored in the DSN memory, the first module operable to issue at least one or more of sets of at least a decode threshold number of read commands to the DS token module regarding retrieval of the one or more sets of encoded ingress data slices; and

the DS token module operable to;

convert the at least one or more of sets of at least the decode threshold number of read commands into at least one or more of sets of at least the decode threshold number of DSN read commands;

issue, via the computing device, the at least one or more of sets of at least the decode threshold number of DSN read commands to dispersed storage (DS) units of the DSN memory;

convert one or more sets of a least a decode threshold number of DSN encoded data slices received from the DSN memory into the one or more sets of encoded ingress data slices; and

provide the one or more sets of encoded ingress data slices to the first module.

24. The module of claim 15 further comprises:

an interface module for interfacing with a dispersed storage (DS) token module;

the second module operable to determine whether the one or more sets of encoded instruction slices are stored in main memory of a computing device or in dispersed storage network (DSN) memory;

(e.g., already retrieved during a previous DSN memory retrieval)

when the one or more sets of encoded instruction slices are stored in the DSN memory, the second module operable to issue at least one or more of sets of at least a decode threshold number of read commands to the DS token module regarding retrieval of the one or more sets of encoded instruction slices; and

the DS token module operable to;

convert the at least one or more of sets of at least the decode threshold number of read commands into at least one or more of sets of at least the decode threshold number of DSN read commands;

issue, via the computing device, the at least one or more of sets of at least the decode threshold number of DSN read commands to dispersed storage (DS) units of the DSN memory;

convert one or more sets of a least a decode threshold number of DSN encoded instruction slices received from the DSN memory into the one or more sets of encoded instruction slices; and

provide the one or more sets of encoded instruction slices to the second module.