UNIT FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

• US 20120241953A1
• Filed: 12/28/2010
• Published: 09/27/2012
• Est. Priority Date: 01/05/2010
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: Yamada, Takafumi, Inaba, Tetsuya, Ikeda, Yoshinari, Yanagawa, Katsuhiko, Takahashi, Yoshikazu
• Granted Patent: US 8,907,477 B2
• Time in Patent Office: Days
• US Class Current: 257/737
• CPC Class Codes: H01L 2224/01 Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/4006 with bolts or screws
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/49811 Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 25/115 the devices being arranged next to each other
• CPC Class Codes: H01L 25/18 the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H05K 7/02 Arrangements of circuit components or wiring on supporting structure
• CPC Class Codes: H05K 7/20509 Multiple-component heat spreaders; Multi-component heat-conducting support plates; Multi-component non-closed heat-conducting structures

Abstract

A semiconductor device has a single unit capable of improving adhesion to a cooling body and a heat dissipation performance, and an aggregate of the single units is capable of configuring any circuit at a low cost. A single unit (101) includes copper blocks (1, 8), an insulating substrate (6) with a conductive pattern, an IGBT chip (10), a diode chip (13), a collector terminal pin (15), implant pins (17) fixed to the chips (10) by solder (11), a printed circuit board (16) having the implant pins (17) fixed thereto, an emitter terminal pin (19), a control terminal pin (20), a collector terminal pin (15), and a resin case (21) having the above-mentioned components sealed therein. The copper blocks (1, 8) make it possible to improve adhesion to a cooling body and the heat dissipation performance. A plurality of single units (101) can be combined with an inter-unit wiring board to form any circuit.

Claims

1. A unit for a semiconductor device, comprising:

an insulating substrate having a first conductive pattern formed on one surface and a second conductive pattern formed on the other surface;

a first conductive block fixed to the first conductive pattern with a solder;

a second conductive block fixed to the second conductive pattern with a solder;

a semiconductor chip having one surface fixed to the second conductive block with a solder;

a plurality of implant pins fixed to the other surface of the semiconductor chip with a solder;

a printed circuit board having a third conductive pattern formed and the implant pins fixed thereon;

a first external lead terminal fixed to the second conductive block;

a second external lead terminal fixed to the third conductive pattern and electrically connected to the implant pins; and

a resin case sealed such that the first conductive block is exposed from a first surface thereof, and ends of the first external lead terminal and the second external lead terminal protrude from a second surface at an opposite side of the first surface.

2. A unit for a semiconductor device, comprising:

an insulating substrate having a first conductive pattern formed on one surface and a second conductive pattern formed on the other surface;

a first conductive block fixed to the first conductive pattern with a solder;

a second conductive block fixed to the second conductive pattern with a solder;

a semiconductor chip having one surface fixed to the second conductive block with a solder;

a plurality of implant pins fixed to the other surface of the semiconductor chip with a solder;

a printed circuit board having a third conductive pattern formed and the implant pins fixed thereon;

two first external lead terminals fixed to the second conductive block;

two second external lead terminals fixed to the third conductive pattern and electrically connected to the implant pins; and

a resin case sealed such that the first conductive block is exposed from a first surface thereof, ends of the first external lead terminals protrude from a second surface adjacent to the first surface and a third surface opposite to the second surface, and ends of the second external lead terminals protrude from a fourth surface adjacent to the first surface and a fifth surface at an opposite side of the fourth surface.

3. A semiconductor device comprising:

a plurality of units for the semiconductor device, each including an insulating substrate having a first conductive pattern formed on one surface and a second conductive pattern formed on the other surface;

a first conductive block fixed to the first conductive pattern with a solder;

a second conductive block fixed to the second conductive pattern with a solder;

a semiconductor chip having one surface fixed to the second conductive block with a solder;

a plurality of implant pins fixed to the other surface of the semiconductor chip with a solder;

a printed circuit board having a third conductive pattern formed and the implant pins fixed thereon;

a first external lead terminal fixed to the second conductive block;

a second external lead terminal fixed to the third conductive pattern and electrically connected to the implant pins; and

a resin case sealed such that the first conductive block is exposed from a first surface thereof and ends of the first external lead terminal and the second external lead terminal protrude from a second surface at an opposite side of the first surface;

a wiring substrate disposed on one side with an aggregate of the units for the semiconductor device and electrically connecting to the first external lead terminals and the second external lead terminals, said wiring substrate having a wiring pattern to wire between the units for the semiconductor device; and

attachment members sandwiching the aggregate of the units for the semiconductor device from two side surfaces and having holes to fix the aggregate of the units for the semiconductor device to a cooling body with the wiring substrate by screwing bolts.

6. A semiconductor device according to claim 3, further comprising a control terminal pin fixed to the third conductive pattern, and connected to a gate electrode of the semiconductor chip through the implant pins, said control terminal pin protruding from the second surface of the resin case.

7. A semiconductor device according to claim 3, wherein the first conductive block and the second conductive block are copper blocks.

8. A semiconductor device according to claim 3, further comprising an elastic body interposed between the units for the semiconductor device and the wiring substrate.

9. A semiconductor device according to claim 3, wherein the aggregate of the units for the semiconductor device is connected and assembled by fitting a concave portion formed in opposed third surfaces adjacent to the first surface of the resin case, and a convex portion formed on opposed fourth surfaces adjacent to the first surface.

4. A semiconductor device comprising:

a plurality of units for the semiconductor device, each including an insulating substrate having a first conductive pattern formed on one surface and a second conductive pattern formed on the other surface;

a first conductive block fixed to the first conductive pattern with a solder;

a second conductive block fixed to the second conductive pattern with a solder;

a semiconductor chip having one surface fixed to the second conductive block with a solder;

a plurality of implant pins fixed to the other surface of the semiconductor chip with a solder;

a printed circuit board having a third conductive pattern formed and the implant pins fixed thereon;

two first external lead terminals fixed to the second conductive block;

two second external lead terminals fixed to the third conductive pattern and electrically connected to the implant pins; and

a resin case sealed such that the first conductive block is exposed from a first surface thereof, ends of the first external lead terminals protrude from a second surface adjacent to the first surface and a third surface opposite to the second surface, and ends of the second external lead terminals protrude from a fourth surface adjacent to the first surface and a fifth surface at an opposite side of the fourth surface;

connection members connecting the first external lead terminals adjacent to each other, the second external lead terminals adjacent to each other, and the first external lead terminal and the second external lead terminal in the adjacent units for the semiconductor device to form a circuit, and connecting the units for the semiconductor device; and

attachment members sandwiching an aggregate of the units for the semiconductor device from two side surfaces and having holes to fix the aggregate of the units for the semiconductor device to a cooling body.

5. A semiconductor device comprising:

a plurality of units for the semiconductor device, each including an insulating substrate having a first conductive pattern formed on one surface and a second conductive pattern formed on the other surface;

a first conductive block fixed to the first conductive pattern with a solder;

a second conductive block fixed to the second conductive pattern with a solder;

a semiconductor chip having one surface fixed to the second conductive block with a solder;

a plurality of implant pins fixed to the other surface of the semiconductor chip with a solder;

a printed circuit board having a third conductive pattern formed and the implant pins fixed thereon;

a first external lead terminal fixed to the second conductive block;

a second external lead terminal fixed to the third conductive pattern and electrically connected to the implant pins; and

a resin case sealed such that the first conductive block is exposed from a first surface thereof and ends of the first external lead terminal and the second external lead terminal protrude from a second surface at an opposite side of the first surface;

a wiring substrate disposed on one side of an aggregate of the units for the semiconductor device and electrically connecting to the first external lead terminals and the second external lead terminals, said wiring substrate having a wiring pattern to wire between the units for the semiconductor device;

attachment members sandwiching an aggregate of the units for the semiconductor device from two side surfaces and having holes to fix the aggregate of the units for the semiconductor device to a cooling body with the wiring substrate by screwing bolts; and

an adhesive to fix the units for the semiconductor device to each other, and the units for the semiconductor device to the attachment members.

10. A semiconductor device according to claim 5, wherein a sealing material forming the resin case has a thermal expansion coefficient of 1.5×

10-5/°

C. to 1.8×

10-5/°

C.

11. A semiconductor device according to claim 5, wherein an adhesion strength of a sealing material forming the resin case to the first conductive block is in a range of 10 MPa to 30 MPa.

12. A semiconductor device according to claim 5, wherein a heat distortion temperature of a sealing material forming the resin case is in a range of 150°

C. to 200°

C.

13. A semiconductor device according to claim 5, wherein a sealing material forming the resin case is a two-liquid mixture sealing material of a phenol-novolac-based epoxy resin and an acid anhydride curing agent including a silica filler.

14. A semiconductor device according to claim 5, wherein an adhesion strength of the adhesive between the units for the semiconductor device and an adhesion strength of the adhesive between the unit for the semiconductor device and the attachment member are in a range of 10 MPa to 30 MPa.

15. A semiconductor device according to claim 5, wherein a heat distortion temperature of the adhesive is in a range of 150°

C. to 200°

C.

16. A semiconductor device according to claim 5, wherein the adhesive is a two-liquid mixture adhesive of a phenol-novolac-based epoxy resin and an acid anhydride curing agent without including a silica filler.