VOLTAGE REGULATOR

• US 20120242316A1
• Filed: 03/20/2012
• Published: 09/27/2012
• Est. Priority Date: 03/24/2011
• Status: Active Grant

• Current Assignee: Ablic Inc. (Minebea Mitsumi, Inc.)
• Original Assignee: Seiko Instruments Incorporated (Seiko Group)
• Inventors: Sudo, Minoru
• Granted Patent: US 8,547,080 B2
• Time in Patent Office: Days
• US Class Current: 323/311
• CPC Class Codes: G05F 1/573 with overcurrent detector
• CPC Class Codes: H02J 7/0034 using reverse polarity correcting or protecting circuits mechanical means of polarity protection H02J7/0045

Abstract

Provided is a voltage regulator capable of preventing a large current from flowing even when a battery (110) is connected with reverse polarity by mistake. The voltage regulator employs a circuit configuration in which a substrate potential (n-well) of an output transistor (103) of the voltage regulator is not fixed to a potential of a VDD terminal, and a power supply of a reference voltage circuit (101) and an error amplifier (102) is not fixed to the VDD terminal.

Claims

1. A voltage regulator, comprising:

a positive power supply terminal, a negative power supply terminal, and an output terminal;

a first P-channel transistor provided between the positive power supply terminal and the output terminal;

a differential amplifier circuit for controlling a gate voltage of the first P-channel transistor so that a voltage at the output terminal becomes constant;

a second P-channel transistor including a gate connected to the negative power supply terminal, a drain connected to the positive power supply terminal, and a source connected to a substrate (n-well) thereof, for connecting a substrate (n-well) of the first P-channel transistor to the positive power supply terminal; and

a third P-channel transistor including a gate connected to the negative power supply terminal, a drain connected to the positive power supply terminal, and a source connected to a substrate (n-well) thereof, for connecting a positive power supply of the differential amplifier circuit to the positive power supply terminal,

wherein the substrate (n-well) of the first P-channel transistor is connected to the substrate (n-well) of the second P-channel transistor, and

wherein the positive power supply of the differential amplifier circuit is connected to the substrate (n-well) of the third P-channel transistor.

2. A voltage regulator according to claim 1, further comprising a fourth P-channel transistor including a gate connected to the positive power supply terminal, a drain connected to the output terminal, and a source connected to a substrate (n-well) thereof, for connecting the substrate (n-well) of the first P-channel transistor to the output terminal.