CONVERTER INCLUDING A BOOTSRAP CIRCUIT AND METHOD

• US 20120242393A1
• Filed: 03/21/2011
• Published: 09/27/2012
• Est. Priority Date: 03/21/2011
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Chen, Weiyun, Stapleton, Michael A., Feng, Xiaogang
• Granted Patent: US 9,136,836 B2
• Time in Patent Office: Days
• US Class Current: 327/390
• CPC Class Codes: H03K 17/165 by feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 2217/0063 High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load

Abstract

In accordance with an embodiment, a converter includes a circuit and method for charging a bootstrap capacitor. The circuit monitors a voltage across the bootstrap capacitor and enables charging the bootstrap capacitor in response to the voltage across the bootstrap capacitor being less than a threshold voltage.

Claims

1. A bootstrap circuit suitable for use in a converter, comprising:

a sense circuit having first, second, and third input terminals and an output terminal; and

a first logic gate having first and second input terminals and an output terminal, the first input terminal of the first logic gate coupled to the output terminal of the sense circuit.

2. The bootstrap circuit of claim 1, wherein sense circuit comprises:

an amplifier having first and second input terminals and an output terminal, wherein the first and second input terminals of the amplifier serve as the first and second input terminals of the sense circuit;

a comparator having first and second input terminals and an output terminal, the first input terminal of the comparator coupled to the output terminal of the amplifier and the second input terminal of the comparator serving as the third input terminal of the sense circuit;

a second logic gate having first and second input terminals and an output terminal, the first input terminal of the second logic gate coupled to the output terminal of the comparator; and

a pulse generator having an input terminal and an output terminal, the input terminal of the pulse generator coupled to the output terminal of the second logic gate.

3. The bootstrap circuit of claim 2, wherein the second input terminal of the comparator is coupled for receiving a reference voltage.

4. The bootstrap circuit of claim 3, further including a third logic gate having an input terminal and an output terminal, the input terminal of the third logic gate coupled to the output terminal of the pulse generator and the output terminal of the third logic gate coupled to the first input terminal of the first logic gate.

5. The bootstrap circuit of claim 2, wherein the pulse generator comprises a one shot.

6. The bootstrap circuit of claim 1, further including a second logic gate having an input terminal and an output terminal, the input terminal of the second logic gate coupled to the output terminal of the sense circuit and the output terminal of the second logic gate coupled to the first input terminal of the first logic gate.

7. The bootstrap circuit of claim 1, wherein the sense circuit comprises:

an amplifier having first and second input terminals and an output terminal, wherein the first and second input terminals of the amplifier serve as the first and second input terminals of the sense circuit;

a comparator with hysteresis having first and second input terminals and an output terminal, the first input terminal of the comparator with hysteresis coupled to the output terminal of the amplifier and the second input terminal of the comparator with hysteresis serving as the third input terminal of the sense circuit; and

a second logic gate having first and second input terminals and an output terminal, the first input terminal of the second logic gate coupled to the output terminal of the comparator with hysteresis.

8. The bootstrap circuit of claim 7, further including an inverter coupled between the output terminal of the second logic gate and the first input terminal of the first logic gate.

9. The bootstrap circuit of claim 7, wherein the second input terminals of the first and second logic gates are coupled for receiving a pulse width modulation signal.

10. The bootstrap circuit of claim 1, further including an energy storage element coupled between the first and second input terminals of the sense circuit.

11. A converter comprising:

first and second transistors each transistor of the first and second transistors having a control electrode and first and second current carrying electrodes, wherein the second current carrying electrode of the first transistor is coupled to the first current carrying electrode of the second transistor; and

a bootstrap circuit comprising;

a sense circuit having first, second, and third input terminals and an output terminal; and

a first logic gate having first and second input terminals and an output terminal, the first input terminal of the first logic gate coupled to the output terminal of the sense circuit.

12. The converter of claim 11, wherein the sense circuit comprises:

a sense amplifier having first and second input terminals and an output terminal;

a comparator with hysteresis having first and second input terminals and an output terminal, the first input terminal of the comparator with hysteresis coupled to the output terminal of the sense amplifier; and

a second logic gate having first and second input terminals and an output terminal, the first input terminal coupled to the output terminal of the comparator with hysteresis, wherein the output terminal of the second logic gate serves as the output terminal of the sense circuit.

13. The converter of claim 12, further including an inverter coupled between the output terminal of the sense circuit and the first input terminal of the first logic gate.

14. The converter of claim 11, f wherein the sense circuit comprises:

a sense amplifier having first and second input terminals and an output terminal;

a comparator having first and second input terminals and an output terminal, the first input terminal of the comparator coupled to the output terminal of the sense amplifier;

a second logic gate having first and second input terminals and an output terminal, the first input terminal of the second logic circuit coupled to the output terminal of the comparator; and

a one shot having an input terminal and an output terminal, the input terminal coupled to the output terminal of the second logic gate and the output terminal of the one shot serving as the output terminal of the sense circuit.

15. The converter of claim 14, further including an inverter coupled between the output terminal of the sense circuit and the first input terminal of the first logic gate.

16. A method for operating a converter, comprising:

providing first and second transistors, the first transistor having a control electrode and first and second current carrying electrodes and the second transistor having a control electrode and first and second current carrying electrodes, wherein the second current carrying electrode of the first transistor is coupled to the first current carrying electrode of the second transistor;

sensing a signal across an energy storage element to generate a sense signal; and

in response to the sense signal being less than a reference level, turning on the second transistor and holding the first transistor in an off state, wherein a current flowing through the second transistor charges the energy storage element.

17. The method of claim 16, wherein sensing the signal across the energy storage element comprises sensing a voltage across a capacitor.

18. The method of claim 16, wherein turning on the second transistor includes turning the second transistor on for a predetermined amount of time.

19. The method of claim 16, wherein turning on the second transistor includes turning on the second transistor in response to a pulse width modulation signal.

20. The method of claim 16, further including turning on the first transistor in response to the sense signal being greater than the reference level.