ARRAY SUBSTRATE, LIQUID CRYSTAL PANEL AND DISPLAY DEVICE
First Claim
1. An array substrate comprising a plurality of pixel units each of which comprises a gate scanning line, a source scanning line, a thin film transistor (TFT), a storage capacitor, and at least one photosensitive transistor,wherein a gate electrode of the photosensitive transistor and a gate electrode of the TFT are connected with the same gate scanning line, a drain electrode of the photosensitive transistor and a drain electrode of the TFT are connected with the storage capacitor, a source electrode of the TFT is connected with the source scanning line, and a source electrode of the photosensitive transistor is connected with its own gate electrode.
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Abstract
Embodiments of the disclosed technology provide an array substrate comprising a plurality of pixel units each of which comprises a gate scanning line, a source scanning line, a thin film transistor (TFT), a storage capacitor, and at least one photosensitive transistor, wherein a gate electrode of the photosensitive transistor and a gate electrode of the TFT are connected with the same gate scanning line, a drain electrode of the photosensitive transistor and a drain electrode of the TFT are connected with the storage capacitor, a source electrode of the TFT is connected with the source scanning line, and a source electrode of the photosensitive transistor is connected with its own gate electrode. In addition, the embodiments of the disclosed technology also provide a liquid crystal panel comprising the array substrate and a display device comprising the liquid crystal panel.
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Citations
15 Claims
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1. An array substrate comprising a plurality of pixel units each of which comprises a gate scanning line, a source scanning line, a thin film transistor (TFT), a storage capacitor, and at least one photosensitive transistor,
wherein a gate electrode of the photosensitive transistor and a gate electrode of the TFT are connected with the same gate scanning line, a drain electrode of the photosensitive transistor and a drain electrode of the TFT are connected with the storage capacitor, a source electrode of the TFT is connected with the source scanning line, and a source electrode of the photosensitive transistor is connected with its own gate electrode.
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7. A liquid crystal panel, comprising a color filter substrate, an array substrate and a liquid crystal layer interposed therebetween,
wherein the color filter substrate comprises color filters and a black matrix thereon, wherein the array substrate comprises a plurality of pixel unit each of which comprises a gate scanning line, a source scanning line, a thin film transistor (TFT), a storage capacitor, and at least one photosensitive transistor, and wherein a gate electrode of the photosensitive transistor and a gate electrode of the TFT are connected with the same gate scanning line, a drain electrode of the photosensitive transistor and a drain electrode of the TFT are connected with the storage capacitor, a source electrode of the TFT is connected with the source scanning line, and a source electrode of the photosensitive transistor is connected with its own gate electrode.
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15. A display device comprising a liquid crystal panel which comprises a color filter substrate, an array substrate and a liquid crystal layer interposed therebetween,
wherein the color filter substrate comprises color filters and a black matrix thereon, wherein the array substrate comprises a plurality of pixel unit each of which comprises a gate scanning line, a source scanning line, a thin film transistor (TFT), a storage capacitor, and at least one photosensitive transistor, and wherein a gate electrode of the photosensitive transistor and a gate electrode of the TFT are connected with the same gate scanning line, a drain electrode of the photosensitive transistor and a drain electrode of the TFT are connected with the storage capacitor, a source electrode of the TFT is connected with the source scanning line, and a source electrode of the photosensitive transistor is connected with its own gate electrode.
Specification