METHOD AND APPARATUS FOR USING UNUSED BITS IN A MEMORY POINTER

• US 20120246437A1
• Filed: 03/22/2011
• Published: 09/27/2012
• Est. Priority Date: 03/22/2011
• Status: Active Grant

• Current Assignee: Oracle International Corporation (Oracle Corporation)
• Original Assignee: Oracle International Corporation (Oracle Corporation)
• Inventors: Radovic, Zoran, Murphy, Graham Ricketson, Jordan, Paul J., Johnson, John G.
• Granted Patent: US 8,732,430 B2
• Time in Patent Office: Days
• US Class Current: 711/170
• CPC Class Codes: G06F 12/02 Addressing or allocation; Relocation program address sequencing G06F9/00; arrangements for selecting an address in a digital store G11C8/00
• CPC Class Codes: G06F 12/0253 Garbage collection, i.e. reclamation of unreferenced memory
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 8/315 Object-oriented languages

Abstract

The disclosed embodiments provide a system that uses unused bits in a memory pointer. During operation, the system determines a set of address bits in a address space that will not be needed for addressing purposes during program operation. Subsequently, the system stores data associated with the memory pointer in this set of address bits. The system masks this set of address bits when using the memory pointer to access the memory address associated with the memory pointer. Storing additional data in unused pointer bits can reduce the number of memory accesses for a program and improve program performance and/or reliability.

Claims

1. A computer-implemented method for using unused bits in a memory pointer, comprising:

determining a set of address bits in an address space that are not needed for addressing during program operation;

storing data associated with the memory pointer in the set of address bits, wherein the stored data comprises data associated with an object that the memory pointer points to; and

masking the set of address bits when using the memory pointer to access a memory address;

wherein accessing the stored data from the set of address bits facilitates reducing the number of memory accesses needed to access object data.

2. The computer-implemented method of claim 1,

wherein the stored data comprises object data associated with a garbage collection operation;

and

wherein reducing the number of memory accesses for objects during garbage collection facilitates speeding up the garbage collection operation.

3. The computer-implemented method of claim 1,

wherein a processor register is configured to track the number of bits in the set of address bits;

and

wherein masking the set of address bits involves checking the processor register to determine the address bits to be masked for the memory pointer.

4. The computer-implemented method of claim 1, wherein the set of address bits are masked before the memory pointer is received by a processor TLB for translation to a physical memory address.

5. The computer-implemented method of claim 1, wherein determining the set of address bits that are not needed for addressing involves one or more of the following:

specifying the set of address bits during a compilation operation;

receiving a specification for the set of address bits from a program binary being loaded; and

dynamically determining the set of address bits based on at least one of an available processor, a physical memory size, and predicted application addressing needs.

6. The computer-implemented method of claim 1, wherein storing data associated with the memory pointer in the set of address bits further involves one or more of the following:

configuring a runtime environment to store and access data in the set of address bits;

configuring a compiler to generate instructions that store and access data in the set of address bits;

configuring a heap manager to store and access data in the set of address bits; and

configuring a program load mechanism in an operating system to facilitate storing and accessing data in the set of address bits.

7. The computer-implemented method of claim 1,

wherein the stored data comprises origination data associated with the memory pointer;

and

wherein storing origination data for the memory pointer facilitates determining the cause of bugs associated with the memory pointer.

8. The computer-implemented method of claim 1,

wherein the stored data comprises memory version information associated with the memory pointer;

and

wherein storing memory version information for the memory pointer facilitates ensuring that a memory region associated with the memory pointer is valid.

9. A non-transitory computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform a method for using unused bits in a memory pointer, the method comprising:

determining a set of address bits in an address space that are not needed for addressing during program operation;

storing data associated with the memory pointer in the set of address bits, wherein the stored data comprises data associated with an object that the memory pointer points to; and

masking the set of address bits when using the memory pointer to access a memory address;

wherein accessing the stored data from the set of address bits facilitates reducing the number of memory accesses needed to access object data.

10. The non-transitory computer-readable storage medium of claim 9,

wherein the stored data comprises object data associated with a garbage collection operation;

and

wherein reducing the number of memory accesses for objects during garbage collection facilitates speeding up the garbage collection operation.

11. The non-transitory computer-readable storage medium of claim 9,

wherein a processor register is configured to track the number of bits in the set of address bits;

and

wherein masking the set of address bits involves checking the processor register to determine the address bits to be masked for the memory pointer.

12. The non-transitory computer-readable storage medium of claim 9, wherein the set of address bits are masked before the memory pointer is received by a processor TLB for translation to a physical memory address.

13. The non-transitory computer-readable storage medium of claim 9, wherein determining the set of address bits that are not needed for addressing involves one or more of the following:

specifying the set of address bits during a compilation operation;

receiving a specification for the set of address bits from a program binary being loaded; and

dynamically determining the set of address bits based on at least one of an available processor, a physical memory size, and predicted application addressing needs.

14. The non-transitory computer-readable storage medium of claim 9, wherein storing data associated with the memory pointer in the set of address bits further involves one or more of the following:

configuring a runtime environment to store and access data in the set of address bits;

configuring a compiler to generate instructions that store and access data in the set of address bits;

configuring a heap manager to store and access data in the set of address bits; and

configuring a program load mechanism in an operating system to facilitate storing and accessing data in the set of address bits.

15. The non-transitory computer-readable storage medium of claim 9,

wherein the stored data comprises origination data associated with the memory pointer;

and

wherein storing origination data for the memory pointer facilitates determining the cause of bugs associated with the memory pointer.

16. The non-transitory computer-readable storage medium of claim 9,

wherein the stored data comprises memory version information associated with the memory pointer;

and

wherein storing memory version information for the memory pointer facilitates ensuring that a memory region associated with the memory pointer is valid.

17. A computing device configured to use unused bits in a memory pointer, comprising:

a processor;

a memory;

a determining mechanism configured to determine a set of address bits in an address space that are not needed for addressing during program operation;

a storage mechanism configured to store data associated with the memory pointer in the set of address bits, wherein the stored data comprises data associated with an object that the memory pointer points to; and

a masking mechanism configured to mask the set of address bits when using the memory pointer to access an address in the memory;

wherein accessing the stored data from the set of address bits facilitates reducing the number of memory accesses needed to access object data.

18. The computing device of claim 17,

wherein the computing device further comprises a register that is configured to track the number of bits in the set of address bits;

and

wherein masking the set of address bits involves checking the register to determine the address bits to be masked for the memory pointer.

19. The computing device of claim 17, wherein the set of address bits are masked before the memory pointer is received by a processor TLB for translation to a physical memory address.

20. The computing device of claim 17, wherein determining the set of address bits that are not needed for addressing involves one or more of the following:

specifying the set of address bits during a compilation operation;

receiving a specification for the set of address bits from a program binary being loaded; and

dynamically determining the set of address bits based on at least one of a characteristic of the processor, a physical memory size available to the processor, and predicted application addressing needs.