DUAL WELL READ-OUT INTEGRATED CIRCUIT (ROIC)
First Claim
1. A method comprising:
- receiving signal data from a pixel of a focal plane array (FPA);
in response to determining the received signal data includes high-frequency signal data, processing the high-frequency signal data via a high frequency path of a read-out integrated circuit (ROIC) to produce a first voltage output; and
in response to determining the received signal data includes low-frequency signal data, integrating the low-frequency signal data via a low frequency path of the ROIC to produce a second voltage output.
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Accused Products
Abstract
Embodiments of the invention describe solutions directed towards having a single camera capable of capturing high speed laser return pulses for a target, as well as provide imaging information on the background of the target. This capability is enabled by having a read-out integrated circuit (ROIC) capable of extracting both types of information from a pixel of a focal plane array (FPA).
Embodiments of the invention describe an ROIC topology that allows for the ability to distinguish between high frequency and low frequency signal paths, and provide supporting circuitry to process the two paths separately. One path may integrate the low frequency background scene to provide a high fidelity image of the scene. The second path may process high frequency noise and multiple laser pulse returns within a frame. These two paths may be combined to provide a background image with a superimposed laser return.
41 Citations
20 Claims
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1. A method comprising:
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receiving signal data from a pixel of a focal plane array (FPA); in response to determining the received signal data includes high-frequency signal data, processing the high-frequency signal data via a high frequency path of a read-out integrated circuit (ROIC) to produce a first voltage output; and in response to determining the received signal data includes low-frequency signal data, integrating the low-frequency signal data via a low frequency path of the ROIC to produce a second voltage output. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An integrated circuit comprising:
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circuitry to receive signal data from a pixel of a focal plane array (FPA); a high-frequency signal processing path comprising a first input impedance to enable receiving any high-frequency data present in the received signal data, the high-frequency signal processing path to process any received high-frequency signal data to produce a first output voltage; and a low-frequency signal processing path comprising a second input impedance to enable receiving any low-frequency data present in the received signal data, the low-frequency signal processing path to integrate any received low-frequency signal data to produce a second voltage output. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A system comprising:
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a focal plane array (FPA); a signal processor; and a read-out integrated circuit (ROIC) operatively coupled to the FPA and the signal processor, the ROIC to include circuitry to receive signal data from a pixel of the FPA, a high-frequency signal processing path comprising a first input impedance to enable receiving any high-frequency data present in the received signal data, the high-frequency signal processing path to process any received high-frequency signal data to produce a first output voltage to be received by the signal processor, and a low-frequency signal processing path comprising a second input impedance to enable receiving any low-frequency data present in the received signal data, the low-frequency signal processing path to integrate any received low-frequency signal data to produce a second voltage output to be received by the signal processor. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification