IMAGE PROCESSING DEVICE, IMAGE PROCESSING SYSTEM AND BANK MANAGEMENT METHOD

• US 20120249834A1
• Filed: 03/01/2012
• Published: 10/04/2012
• Est. Priority Date: 03/29/2011
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: TSURUTA, Toru, KANEKO, Soutaro
• Granted Patent: US 9,117,298 B2
• Time in Patent Office: Days
• US Class Current: 348/231.99
• CPC Class Codes: G06T 1/60 Memory management
• CPC Class Codes: G09G 2340/0435 Change or adaptation of the frame rate of the video stream
• CPC Class Codes: G09G 5/005 Adapting incoming signals to the display format of the display terminal
• CPC Class Codes: G09G 5/12 Synchronisation between the display unit and other units, e.g. other display units, video-disc players
• CPC Class Codes: G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Abstract

An image processing device includes: first to third address registers that store three addresses, respectively, the three addresses indicating three bank regions, respectively; an input image bank managing unit that, when the image processing device receives an image from an imaging device, switches, between the first address register and the second address register, and sets a flag and supplies the address stored in the first address register as an address for writing the received image; an imaging processing unit that performs image processing on the received image; and an image processing bank managing unit that, when the flag is in a set state and the processed image is switched to another image to be processed, switches, between the second address register and the third address register, resets the flag and supplies to the image processing unit the address stored in the third address register.

Claims

1. An image processing device comprising:

first to third address registers that store three addresses, respectively, the three addresses indicating three bank regions, respectively;

an input image bank managing unit that, when the image processing device receives an image from an imaging device, switches, between the first address register and the second address register, correspondence relationships between the first and second address registers and the addresses stored in the first and second address registers, sets a flag and supplies the address stored in the first address register as an address for writing the received image;

an imaging processing unit that performs image processing on the received image; and

an image processing bank managing unit that, when the flag is in a set state and the processed image is switched to another image to be processed, switches, between the second address register and the third address register, correspondence relationships between the second and third address registers and the addresses stored in the second and third address registers, resets the flag and supplies, to the image processing unit, the address stored in the third address register as an address for reading the processed image.

2. The image processing device according to claim 1,

wherein when the flag is not in the reset state and the processed image is switched to another image to be processed, the image processing bank managing unit switches, between the second address register and the third address register, the correspondence relationships between the second and third address registers and the addresses stored in the second and third address registers, and

wherein the flag is in the reset state and the processed image is switched to the other image to be processed, the image processing bank managing unit does not switch, between the second address register and the third address register, the correspondence relationships between the second and third address registers and the addresses stored in the second and third address registers.

3. The image processing device according to claim 1,

wherein the address that is stored in the third address register can be switched to an address other than the three addresses.

4. The image processing device according to claim 1, further comprising

a plurality of groups of the first to third address registers,

wherein the input image bank managing unit receives a plurality of series of images for the plurality of groups of the first to third address registers, and

wherein the image processing unit performs the image processing on the plurality of series of images.

5. The image processing device according to claim 4,

wherein the timing of switching each of the plurality of series of images is not synchronous with the timing of switching the other series of images.

6. An image processing system comprising:

an imaging device;

an image processing device; and

a display device,

wherein the imaging device acquires a plurality of images,

wherein the image processing device includes

first to third address registers that store three addresses, respectively, the three addresses indicating three bank regions, respectively,

an input image bank managing unit that, when the image processing device receives an image from the imaging device, switches, between the first address register and the second address register, correspondence relationships between the first and second address registers and the addresses stored in the first and second address registers, sets a flag and supplies the address stored in the first address register as an address for writing the image,

an image processing unit that performs image processing on the image, and

an image processing bank managing unit that, when the flag is in a set state and the processed image is switched to another image to be processed, switches, between the second address register and the third address register, correspondence relationships between the second and third address registers and the addresses stored in the second and third address registers, resets the flag and supplies, to the image processing unit, the address stored in the third address register as an address for reading the processed image, and

wherein the display device displays the image processed by the image processing device.

7. The image processing system according to claim 6,

wherein when the flag is not in the reset state and the processed image is switched to the other image to be processed, the image processing bank managing unit switches, between the second address register and the third address register, the correspondence relationships between the second and third address registers and the addresses stored in the second and third address registers, and

wherein when the flag is in the reset state and the processed image is switched to the other image to be processed, the image processing bank managing unit does not switch, between the second address register and the third address register, the correspondence relationships between the second and third address registers and the addresses stored in the second and third address registers.

8. The image processing system according to claim 6,

wherein the address that is stored in the third address register can be switched to an address other than the three addresses.

9. The image processing system according to claim 6,

wherein the image processing device further includes a plurality of groups of the first to third address registers,

wherein the input image bank managing unit receives a plurality of series of images for the plurality of groups of the first to third address registers, and

wherein the image processing unit performs the image processing on the plurality of series of images.

10. The image processing system according to claim 9,

wherein the timing of switching each of the plurality of series of images is not synchronous with the timing of switching the other series of images.

11. An image processing method executed by a computer, the image processing method comprising:

first switching, between a first address register and a second address register, correspondence relationships between the first and second address registers and addresses stored in the first and second address registers when an image is received from an imaging device;

setting a flag when the image is received;

writing the image in a bank region indicated by the address stored in the first address register;

second switching, between the second address register and a third address register, correspondence relationships between the second and third address registers, and the address stored in the second address register and an address stored in the third address register when the flag is in the set state and the image processed by an image processing unit is switched to another image to be processed;

resetting the flag; and

reading, from a bank region indicated by the address stored in the third address register, the image to be subjected to image processing.

12. The image processing method according to claim 11,

wherein in the second switching, when the flag is not in the reset state and the processed image is switched to the other image to be processed, the computer switches, between the second address register and the third address register, the correspondence relationships between the second and third address registers and the addresses stored in the second and third address registers, and

wherein in the second switching, when the flag is in the reset state and the processed image is switched to the other image to be processed, the computer does not switch, between the second address register and the third address register, the correspondence relationships between the second and third address registers and the addresses stored in the second and third address registers.

13. The image processing method according to claim 11,

wherein the address that is stored in the third address register can be switched to an address other than the three addresses.

14. The image processing method according to claim 11, further comprising:

receiving a plurality of series of images for a plurality of groups of the first to third address registers; and

performing the image processing on the plurality of series of images.

15. The image processing method according to claim 14,

wherein the timing of switching each of the plurality of series of images is not synchronous with the timing of switching the other series of images.