SEAMLESS APPLICATION ACCESS TO HYBRID MAIN MEMORY

• US 20120260030A1
• Filed: 06/18/2012
• Published: 10/11/2012
• Est. Priority Date: 11/04/2006
• Status: Active Grant

• Current Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Virident Systems Inc. (Western Digital Corporation)
• Inventors: Karamcheti, Vijay, Okin, Kenneth A., Ganapathy, Kumar, Singhai, Ashish, Parekh, Rajesh
• Granted Patent: US 8,782,373 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0207 with multidimensional access, e.g. row/column, matrix
• CPC Class Codes: G06F 12/0223 User address space allocation, e.g. contiguous or non contiguous base addressing
• CPC Class Codes: G06F 12/0292 using tables or multilevel address translation means G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10
• CPC Class Codes: G06F 12/08 in hierarchically structured memory systems, e.g. virtual memory systems
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/121 using replacement algorithms
• CPC Class Codes: G06F 12/1475 in a virtual system, e.g. with translation means
• CPC Class Codes: G06F 13/1657 Access to multiple memories
• CPC Class Codes: G06F 13/1694 Configuration of memory controller to different memory types
• CPC Class Codes: G06F 2212/205 Hybrid memory, e.g. using both volatile and non-volatile memory
• CPC Class Codes: G06F 2212/657 Virtual address space management
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0628 making use of a particular technique
• CPC Class Codes: G06F 3/0638 Organizing or formatting or addressing of data
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0646 Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
• CPC Class Codes: G06F 3/0647 Migration mechanisms
• CPC Class Codes: G06F 3/068 Hybrid storage device
• CPC Class Codes: G06F 3/0685 Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
• CPC Class Codes: G06F 9/5016 : the resource being the memory
• CPC Class Codes: Y02D 10/00 : Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A command from an application is received to access a data structure associated with one or more virtual addresses mapped to main memory. A first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the symmetric memory components and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the asymmetric memory components are identified. Data associated with the virtual address from the first physical addresses and data associated with the virtual addresses from the second physical addresses are accessed. The data associated with the symmetric and asymmetric memory components is accessed by the application without providing the application with an indication of whether the data is accessed within the symmetric memory component or the asymmetric memory component.

Claims

1. A method of accessing data from a memory system that has multiple parts including at least a first part of the memory system and a second part of the memory system, the first part of the memory system being different from the second part of the memory system in that the first part of the memory system has different access characteristics than the second part of the memory system or the first part of the memory system is used for a different type of memory-dependent operation than the second part of the memory system, the method comprising:

receiving a command from an application to access a data structure associated with multiple virtual addresses mapped to the memory system;

querying, based on the virtual addresses associated with the data structure, a table that manages first virtual addresses associated with first physical addresses in the first part of the memory system and second virtual addresses associated with second physical addresses within the second part of the memory system;

identifying, based on results of querying the table, a first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the first part of the memory system and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the second part of the memory system;

in response to identifying the first subset of virtual addresses for the data structure that are mapped to the first part of the memory system, identifying, from among the first physical addresses in the first part of the memory system, a first subset of physical addresses in the first part of the memory system that correspond to the first subset of virtual addresses for the data structure and accessing data from the first part of the memory system using the first subset of physical addresses;

in response to identifying the second subset of virtual addresses for the data structure that are mapped to the second part of the memory system, identifying, from among the second physical addresses within the second part of the memory system, a second subset of physical addresses within the second part of the memory system that correspond to the second subset of virtual addresses for the data structure and accessing data from the second part of the memory system using the second subset of physical addresses;

generating a response to the command received from the application to access the data structure by integrating the data accessed from the first part of the memory system using the first subset of physical addresses and the data accessed from the second part of the memory system using the second subset of physical addresses; and

providing the generated response to the application without providing the application with an indication of whether the data included in the response was accessed within the first part of the memory system or the second part of the memory system.

2. The method of claim 1, further comprising:

accounting for movement, during execution of the command from the application to read data associated with multiple virtual addresses, of data between the first part of the memory system and the second part of the memory system.

3. The method of claim 2, wherein a particular virtual address included in the multiple virtual addresses is mapped, in the table, to a particular physical address in the first part of the memory system when the command from the application to read data associated with multiple virtual addresses is received, and accounting for movement, during execution of the command from the application to read data associated with multiple virtual addresses, of data between the first part of the memory system and the second part of the memory system includes:

subsequent to receiving the command and prior to reading data corresponding to the particular virtual address included in the multiple virtual addresses, performing a memory migration operation on the data corresponding to the particular virtual address by moving the data corresponding to the particular virtual address from the particular physical address in the first part of the memory system to a particular physical address in the second part of the memory system and updating a portion of the table corresponding to the particular virtual address to reflect the particular physical address in the second part of the memory system; and

reading the data corresponding to the particular virtual address from the particular physical address in the second part of the memory system.

4. The method of claim 2, wherein a particular virtual address included in the multiple virtual addresses is mapped, in the table, to a particular physical address in the second part of the memory system when the command from the application to read data associated with multiple virtual addresses is received, and accounting for movement, during execution of the command from the application to read data associated with multiple virtual addresses, of data between the first part of the memory system and the second part of the memory system includes:

subsequent to receiving the command and prior to reading data corresponding to the particular virtual address included in the multiple virtual addresses, performing a memory migration operation on the data corresponding to the particular virtual address by moving the data corresponding to the particular virtual address from the particular physical address in the second part of the memory system to a particular physical address in the first part of the memory system and updating a portion of the table corresponding to the particular virtual address to reflect the particular physical address in the first part of the memory system; and

reading the data corresponding to the particular virtual address from the particular physical address in the first part of the memory system.

5. The method of claim 1, wherein the first part of the memory system is a symmetric memory component and the second part of the memory system is an asymmetric memory component.

6. The method of claim 1, wherein the first part of the memory system is a volatile memory component and the second part of the memory system is a non-volatile memory component.

7. The method of claim 1, wherein the first part of the memory system is a dynamic random access memory component and the second part of the memory system is a flash memory component.

8. The method of claim 1, wherein the first part of the memory system has first absolute read and write speeds that are faster than second absolute read and write speeds of the second part of the memory system and a first difference between write speed and read speed of the first part of the memory system is less than a second difference between write speed and read speed of the second part of the memory system.

9. The method of claim 1, wherein the first part of the memory system has different access characteristics than the second part of the memory system.

10. The method of claim 1, wherein the first part of the memory system is used for a different type of memory-dependent operation than the second part of the memory system.

11. A system comprising:

a memory system that has multiple parts including at least a first part of the memory system that is different from a second part of the memory system in that the first part of the memory system has different access characteristics than the second part of the memory system or the first part of the memory system is used for a different type of memory-dependent operation than the second part of the memory system; and

a controller configured to perform operations comprising;

receiving a command from an application to access a data structure associated with multiple virtual addresses mapped to the memory system;

querying, based on the virtual addresses associated with the data structure, a table that manages first virtual addresses associated with first physical addresses in the first part of the memory system and second virtual addresses associated with second physical addresses within the second part of the memory system;

identifying, based on results of querying the table, a first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the first part of the memory system and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the second part of the memory system;

in response to identifying the first subset of virtual addresses for the data structure that are mapped to the first part of the memory system, identifying, from among the first physical addresses in the first part of the memory system, a first subset of physical addresses in the first part of the memory system that correspond to the first subset of virtual addresses for the data structure and accessing data from the first part of the memory system using the first subset of physical addresses;

in response to identifying the second subset of virtual addresses for the data structure that are mapped to the second part of the memory system, identifying, from among the second physical addresses within the second part of the memory system, a second subset of physical addresses within the second part of the memory system that correspond to the second subset of virtual addresses for the data structure and accessing data from the second part of the memory system using the second subset of physical addresses;

generating a response to the command received from the application to access the data structure by integrating the data accessed from the first part of the memory system using the first subset of physical addresses and the data accessed from the second part of the memory system using the second subset of physical addresses; and

providing the generated response to the application without providing the application with an indication of whether the data included in the response was accessed within the first part of the memory system or the second part of the memory system.

12. The system of claim 11, wherein the operations further comprise:

accounting for movement, during execution of the command from the application to read data associated with multiple virtual addresses, of data between the first part of the memory system and the second part of the memory system.

13. The system of claim 12, wherein a particular virtual address included in the multiple virtual addresses is mapped, in the table, to a particular physical address in the first part of the memory system when the command from the application to read data associated with multiple virtual addresses is received, and accounting for movement, during execution of the command from the application to read data associated with multiple virtual addresses, of data between the first part of the memory system and the second part of the memory system includes:

subsequent to receiving the command and prior to reading data corresponding to the particular virtual address included in the multiple virtual addresses, performing a memory migration operation on the data corresponding to the particular virtual address by moving the data corresponding to the particular virtual address from the particular physical address in the first part of the memory system to a particular physical address in the second part of the memory system and updating a portion of the table corresponding to the particular virtual address to reflect the particular physical address in the second part of the memory system; and

reading the data corresponding to the particular virtual address from the particular physical address in the second part of the memory system.

14. The system of claim 12, wherein a particular virtual address included in the multiple virtual addresses is mapped, in the table, to a particular physical address in the second part of the memory system when the command from the application to read data associated with multiple virtual addresses is received, and accounting for movement, during execution of the command from the application to read data associated with multiple virtual addresses, of data between the first part of the memory system and the second part of the memory system includes:

subsequent to receiving the command and prior to reading data corresponding to the particular virtual address included in the multiple virtual addresses, performing a memory migration operation on the data corresponding to the particular virtual address by moving the data corresponding to the particular virtual address from the particular physical address in the second part of the memory system to a particular physical address in the first part of the memory system and updating a portion of the table corresponding to the particular virtual address to reflect the particular physical address in the first part of the memory system; and

reading the data corresponding to the particular virtual address from the particular physical address in the first part of the memory system.

15. The system of claim 11, wherein the first part of the memory system is a symmetric memory component and the second part of the memory system is an asymmetric memory component.

16. The system of claim 11, wherein the first part of the memory system is a volatile memory component and the second part of the memory system is a non-volatile memory component.

17. The system of claim 11, wherein the first part of the memory system is a dynamic random access memory component and the second part of the memory system is a flash memory component.

18. The system of claim 11, wherein the first part of the memory system has first absolute read and write speeds that are faster than second absolute read and write speeds of the second part of the memory system and a first difference between write speed and read speed of the first part of the memory system is less than a second difference between write speed and read speed of the second part of the memory system.

19. The system of claim 11, wherein the first part of the memory system has different access characteristics than the second part of the memory system.

20. The system of claim 11, wherein the first part of the memory system is used for a different type of memory-dependent operation than the second part of the memory system.