SEMICONDUCTOR MEMORY DEVICE

• US 20120261664A1
• Filed: 04/11/2012
• Published: 10/18/2012
• Est. Priority Date: 04/15/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Saito, Toshihiko
• Granted Patent: US 8,878,270 B2
• Time in Patent Office: Days
• US Class Current: 257/57
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 27/0288 using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 28/60 Electrodes
• CPC Class Codes: H01L 28/86 having horizontal extensions
• CPC Class Codes: H01L 28/90 having vertical extensions
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H10B 12/053 the transistor being at least partially in a trench in the substrate vertical transistor in combination with a capacitor formed in a substrate trench H10B12/0383
• CPC Class Codes: H10B 12/488 Word lines

Abstract

A semiconductor memory device including a bit line, a word line, a transistor, and a capacitor is provided. The transistor includes source and drain electrodes; an oxide semiconductor film in contact with at least both top surfaces of the source and drain electrodes; a gate insulating film in contact with at least a top surface of the oxide semiconductor film; a gate electrode which overlaps with the oxide semiconductor film with the gate insulating film provided therebetween; and an insulating film covering the source and drain electrodes, the gate insulating film, and the gate electrode. The transistor is provided in a mesh of a netlike conductive film when seen from the above. Here, the drain electrode and the netlike conductive film serve as one and the other of a pair of capacitor electrodes of the capacitor. A dielectric film of the capacitor includes at least the insulating film.

Claims

1. A semiconductor memory device comprising:

a transistor comprising;

a drain electrode; and

an oxide semiconductor film over a top surface of the drain electrode,

a dielectric film over the transistor, wherein the dielectric film is in contact with a side surface of the drain electrode;

a first conductive film and a second conductive film over the dielectric film, and connected with each other;

a capacitor comprising;

the drain electrode;

the first conductive film; and

the dielectric film between the side surface of the drain electrode and a side surface of the first conductive film,

wherein the transistor is provided between the first conductive film and the second conductive film, and

wherein a potential of the capacitor is controlled by the transistor.

3. The semiconductor memory device according to claim 1,

wherein a thickness of the drain electrode is greater than or equal to 0.5 times and less than or equal to 10 times as large as a minimum feature size F.

2. A semiconductor memory device comprising:

a transistor comprising;

a source electrode and a drain electrode;

an oxide semiconductor film in contact with at least a top surface of the source electrode and a top surface of the drain electrode;

a gate insulating film in contact with at least a top surface of the oxide semiconductor film; and

a gate electrode overlapping with the oxide semiconductor film with the gate insulating film provided therebetween,

an insulating film covering the source electrode, the drain electrode, the gate insulating film, and the gate electrode;

a conductive film over the insulating film, wherein the conductive film has a net shape when seen from the above; and

a capacitor comprising;

the drain electrode;

the conductive film; and

the insulating film between a side surface of the drain electrode and a side surface of the conductive film,

wherein the transistor provided in a mesh formed by the conductive film.

4. The semiconductor memory device according to claim 2,

wherein a thickness of the drain electrode is greater than or equal to 0.5 times and less than or equal to 10 times as large as a minimum feature size F.

5. The semiconductor memory device according to claim 2,

wherein the gate electrode is connected to a word line,

wherein the source electrode is connected to a bit line, and

wherein the conductive film is grounded.

6. The semiconductor memory device according to claim 2, further comprising a second insulating film filling a space between the source electrode and the drain electrode.

7. The semiconductor memory device according to claim 2,

wherein the gate insulating film or the insulating film releases oxygen by heat treatment.

8. The semiconductor memory device according to claim 7,

wherein the insulating film has a smaller oxygen diffusion coefficient than the gate insulating film at temperatures higher than or equal to 250°

C. and lower than or equal to 450°

C.

9. The semiconductor memory device according to claim 7,

wherein the insulating film is an aluminum oxide film, and

wherein the gate insulating film or the insulating film is a silicon oxide film or a silicon oxynitride film.