BOOTSTRAP STARTUP AND ASSIST CIRCUIT

• US 20120262144A1
• Filed: 09/10/2010
• Published: 10/18/2012
• Est. Priority Date: 09/10/2009
• Status: Active Grant

• Current Assignee: Mate, LLC
• Original Assignee: E Craftsmen Associates Ltd.
• Inventors: Lyons, Steven
• Granted Patent: US 9,041,379 B2
• Time in Patent Office: Days
• US Class Current: 323/311
• CPC Class Codes: H05B 45/355 Power factor correction [PFC]; Reactive power compensation
• CPC Class Codes: H05B 45/3725 Switched mode power supply [SMPS]
• CPC Class Codes: H05B 45/38 using boost topology
• CPC Class Codes: Y02B 20/30 Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y10S 323/901 Starting circuits

Abstract

A bootstrap assist circuit and a startup circuit comprising a voltage controlled switch and a startup ramp voltage generator connected to the voltage controlled switch that will control a high side switch, a dimming interface or an enable/disable input function. Said system is used to provide a bootstrap technique to continuously switch a floating high side switch (MOSFET) by continuously charging a capacitor and then “level shifting” said capacitor voltage across the gate and source of the said high side switch to turn the switch on.

Claims

1. A bootstrap assist and startup circuit comprising:

a voltage controlled switch; and

a startup ramp voltage generator connected to the voltage controlled switch.

2. The circuit of claim 1 wherein the voltage controlled switch comprises:

at least one resistor; and

a transistor.

3. The circuit of claim 1 wherein the ramp voltage generator comprises:

at least one resistor; and

at least one capacitor.

4. The circuit of claim 1 wherein the circuit is connected to a power factor corrected (PFC) transition mode control.

5. The circuit of claim 4 wherein the voltage controlled switch is connected to the PFC transition mode control.

6. The circuit of claim 1 further comprising a zero current sense portion.

7. The circuit of claim 6 wherein the zero current sense portion comprises:

a resistor; and

a secondary winding of an inductor.

8. The circuit of claim 1 wherein the circuit is controlled by an enable or disable signal.

9. The circuit of claim 8 wherein the enable or disable signal is connected to the startup ramp voltage generator.

10. A method of bootstrap startup comprising:

receiving an input signal to begin bootstrapping;

initiating a startup voltage ramp;

initiating an artificial ramp current sense;

determining if a voltage controlled switch is reverse-biased; and

terminating the artificial ramp current sense if the voltage controlled switch is reverse-biased.

11. The method of claim 10 wherein if the voltage controlled switch is not reverse-biased, repeating initiating the artificial ramp current sense and determining if the voltage controlled switch is reverse-biased until it is determined that the voltage controlled switch is reverse-biased.

12. The method of claim 10 wherein initiating a startup voltage ramp comprises:

transmitting a current through an RC time constant.

13. The method of claim 10 wherein initiating the artificial ramp current sense comprises:

turning on a gate drive signal from a power factor corrected (PFC) transition mode (TM) control.

14. The method of claim 10 wherein initiating the artificial ramp current sense comprises:

detecting a voltage at a current sense pin within a power factor corrected (PFC) transition mode (TM) control.

15. The method of claim 10 wherein initiating the artificial ramp current sense comprises:

detecting a signal at a zero current detector within a power factor corrected (PFC) transition mode (TM) control.

16. The method of claim 10 wherein initiating an artificial ramp current sense comprises:

coupling a gate drive signal of a power factor corrected (PFC) transition mode (TM) control with a current sense of the PFC TM control.