CONTACT AND CONTACTLESS DIFFERENTIAL I/O PADS FOR CHIP-TO-CHIP COMMUNICATION AND WIRELESS PROBING

• US 20120262231A1
• Filed: 05/24/2012
• Published: 10/18/2012
• Est. Priority Date: 12/29/2010
• Status: Active Grant

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: CANEGALLO, Roberto, SCANDIUZZO, Mauro, Perilli, Luca
• Granted Patent: US 8,982,574 B2
• Time in Patent Office: Days
• US Class Current: 330/69
• CPC Class Codes: G01R 31/3025 Wireless interface with the DUT
• CPC Class Codes: H01L 2224/05099 Material
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13599 Material
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/1703 Bump connectors having different sizes, e.g. different diameters, heights or widths
• CPC Class Codes: H01L 2224/29099 Material
• CPC Class Codes: H01L 2224/29599 Material
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73207 Bump and wire connectors
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06531 : Non-galvanic coupling, e.g. capacitive coupling
• CPC Class Codes: H01L 2225/06541 : Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
• CPC Class Codes: H01L 23/48 : Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
• CPC Class Codes: H01L 23/5223 : Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/642 : Capacitive arrangements H01L23/49589, H01L23/645, H01L23/647, H01L23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L23/5222
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/17 : of a plurality of bump connectors
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/0652 : the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/13062 : Junction field-effect transistor [JFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15192 : Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/19015 : including thin film passive components
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H05K 1/0239 : Signal transmission by AC coupling
• CPC Class Codes: H05K 1/0243 : Printed circuits associated with mounted high frequency components
• CPC Class Codes: H05K 1/0245 : Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
• CPC Class Codes: H05K 1/0259 : Electrostatic discharge [ESD] protection
• CPC Class Codes: H05K 2201/0191 : wherein the thickness of the dielectric plays an important role
• CPC Class Codes: H05K 2201/099 : Coating over pads, e.g. solder resist partly over pads

Abstract

Contactless differential coupling structures can be used to communicate signals between circuits located on separate chips or from one chip to a probing device. The contactless coupling structures avoid problems (breaks, erosion, corrosion) that can degrade the performance of ohmic-type contact pads. The contactless coupling structures comprise pairs of conductive pads placed in close proximity. Differential signals are applied across a first pair of differential pads, and the signals are coupled wirelessly to a mating pair of conductive pads. Circuitry for generating and receiving differential signals is described.

Claims

1. A coupling structure comprising:

a first differential pad and a second differential pad arranged as a pair on a first substrate;

an insulating layer extending across coupling surfaces of the first and second differential pads; and

circuitry connected to the first and second differential pads and configured to provide differential signals derived from a first signal to the first and second differential pads.

2. The coupling structure of claim 1, further comprising:

a first mating differential pad located proximal the first differential pad; and

a second mating differential pad located proximal the second differential pad, wherein the first and second mating differential pads are located on a side of the insulating layer opposite the first and second differential pads.

3. The coupling structure of claim 2, wherein the first and second mating differential pads are located on a second substrate placed in close proximity to the first substrate.

4. The coupling structure of claim 2, wherein the first and second mating differential pads are located on a probing device placed in close proximity to the first substrate.

5. The coupling structure of claim 1, further comprising an ohmic-type contact pad located on the first substrate and configured to receive a second signal representative of the first signal.

6. The coupling structure of claim 5, further comprising a mating ohmic-type contact pad in ohmic contact with the ohmic-type contact pad.

7. The coupling structure of claim 6, wherein the mating ohmic-type contact pad is located on a second substrate placed in close proximity to the first substrate.

8. The coupling structure of claim 6, wherein the mating ohmic-type contact pad is located on a probing device placed in close proximity to the first substrate.

9. The coupling structure of claim 1, wherein the first differential pad is located within 50 microns of the second differential pad.

10. The coupling structure of claim 1, wherein the first and second differential pads are formed from conductive material.

11. The coupling structure of claim 1, wherein the circuitry comprises:

a signal receiving node for receiving a signal to be transmitted via the first and second differential pads;

a non-inverting amplifier connected between the signal receiving node and a first transceiving node; and

an inverting amplifier connected between the signal receiving node and a second transceiving node.

12. The coupling structure of claim 11, wherein the first transceiving node is connected to the first differential pad and the second transceiving node is connected to the second differential pad.

13. The coupling structure of claim 11, further comprising:

a receiver having a first receiving input connected to the first transceiving node and a second receiving input connected to the second transceiving node; and

an output connected to a first input of a multiplexor.

14. The coupling structure of claim 13, wherein a second input of the multiplexor is configured to receive a signal representative of the first signal and an output of the multiplexor is configured to be connected to circuitry on the first substrate.

15. The coupling structure of claim 13, wherein the receiver comprises a differential amplifier configured to generate a signal based upon input signals received from the first and second transceiving nodes.

16. A method for coupling a first signal from first circuitry on a first substrate to circuitry external to the first substrate, the method comprising:

receiving, at a first time and at an input node on the first substrate, a first signal from the first circuitry;

producing from the first signal a first pair of differential signals; and

providing the first pair of differential signals to a pair of contactless differential pads located on the first substrate, wherein the act of providing comprises providing the first pair of differential signals through an insulating layer that extends over coupling surfaces of the pair to of contactless differential pads.

17. The method of claim 16, further comprising providing a second signal representative of the first signal to an ohmic-type pad located on the first substrate.

18. The method of claim 16, further comprising coupling the first pair of differential signals wirelessly to a mating pair of contact pads located on a second substrate placed in close proximity to the first substrate.

19. The method of claim 16, wherein the act of producing comprises:

amplifying in a first circuit branch the first signal with a non-inverting amplifier; and

amplifying in a second circuit branch the first signal with an inverting amplifier.

20. The method of claim 16, wherein the first substrate is part of a probe card assembly and the circuitry external to the first substrate comprises integrated circuitry to be tested.

21. The method of claim 16, wherein the pair of contactless differential pads are located within 50 microns of each other.

22. The method of claim 16, wherein the pair of contactless differential pads are formed of a conductive material.

23. The method of claim 16, further comprising:

receiving, at a second time, a second pair of differential signals from the pair of contactless differential pads;

generating a second signal from the second pair of differential signals; and

providing the second signal to an output node on the first substrate.

24. The method of claim 23, wherein the input node and output node are connected to the first circuitry.