Data Management in Solid State Storage Devices

• US 20120266050A1
• Filed: 12/16/2010
• Published: 10/18/2012
• Est. Priority Date: 12/17/2009
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Cideciyan, Roy D., Eleftheriou, Evangelos S., Haas, Robert, Hu, Xiao-Yu, Iliadis, llias
• Granted Patent: US 8,904,261 B2
• Time in Patent Office: Days
• US Class Current: 714/773
• CPC Class Codes: G06F 11/1008 in individual solid state devices G06F11/1004 takes precedence
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: H03M 13/05 using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits H03M13/2906 takes precedence

Abstract

A mechanism is provided for controlling a solid state storage device in which the solid state storage comprises erasable blocks each comprising a plurality of data write locations. Input data is stored in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage. The input data is error correction encoded such that each group contains an error correction code for the input data in that group. Metadata, indicating the location of input data in the solid state storage, is maintained in memory, An indication of validity of data stored in each data write location is also maintained, Prior to erasing a block, valid input data is recovered from the or each said group containing write locations in that block. The recovered data is then re-stored as new input data.

Claims

1. An apparatus comprising a solid state storage device in which a solid state storage in the solid state storage device comprises erasable blocks each erasable block comprising a plurality of data write locations, the apparatus comprising memory and control logic adapted to:

store input data in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage;

error correction encode the input data such that each group contains an error correction code for the input data in that group;

maintain, in the memory, metadata indicating the location of input data in the solid state storage;

maintain an indication of validity of data stored in each data write location; and

prior to erasing a block, recover valid input data from each group containing write locations in that block and re-store the recovered data as new input data.

2. The apparatus as claimed in claim 1, wherein the control logic is adapted such that, at successive stages during storage of input data in the write locations of each group, the control logic computes a transient error correction code for the input data then stored in the group.

3. The apparatus as claimed in claim 2, wherein the control logic is adapted to store the transient error correction code in the solid state storage in response to interruption of power to the control apparatus.

4. The apparatus as claimed in claim 1, wherein the control logic is adapted to select a block for erasing in dependence on the number of write locations containing invalid data in the group or groups which contain write locations in that block.

5. The apparatus as claimed in claim 1, wherein the solid state storage device has a plurality of storage channels each having a set of solid state storage units, and wherein each of the logical subdivisions comprises the set of units in a respective channel.

6. The apparatus as claimed in claim 1, wherein the solid state storage comprises a plurality of storage units and each of the logical subdivisions comprises a respective storage unit.

7. The apparatus as claimed in claim 1, wherein the control logic is adapted such that each [[said ]]group comprises a set of consecutive write locations in each block of the group.

8. The apparatus as claimed in claim 1, wherein the control logic is adapted such that any groups which share a common block in one logical subdivision share a common block in each logical subdivision.

9. The apparatus as claimed in claim 1, wherein the control logic is adapted to dynamically adjust the number of write locations in a group in the successive groups in dependence on predetermined criteria.

10. The apparatus as claimed in claim 1, wherein the metadata comprises an address map indicating a mapping between logical addresses associated with respective input datablocks and physical addresses indicative of write locations in the solid state storage.

11. A solid state storage device comprising solid state storage, which comprises erasable blocks each comprising a set of data write locations, and a control apparatus adapted to:

store input data in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage;

error correction encode the input data such that each group contains an error correction code for the input data in that group;

maintain, in memory metadata indicating the location of input data in the solid state storage;

maintain an indication of validity of data stored in each data write location; and

prior to erasing a block, recover valid input data from each group containing write locations in that block and re-store the recovered data as new input data.

19. The solid state storage device as claimed in claim 11, wherein the solid state storage device has a plurality of storage channels each having a set of solid state storage units, and wherein each of the logical subdivisions comprises the set of units in a respective channel.

20. The solid state storage device as claimed in claim 11, wherein the solid state storage comprises a plurality of storage units and each of the logical subdivisions comprises a respective storage unit.

21. The solid state storage device as claimed in claim 11, wherein the metadata comprises an address map indicating a mapping between logical addresses associated with respective input data blocks and physical addresses indicative of write locations in the solid state storage.

12-14. -14. (canceled)

15. A computer program comprising program code stored on a computer readable storage medium, wherein the program code, when executed on a computer, causes the computer to:

store input data in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of a solid state storage of a solid state storage device;

error correction encode the input data such that each group contains an error correction code for the input data in that group;

maintain, in memory, metadata indicating the location of input data in the solid state storage;

maintain an indication of validity of data stored in each data write location; and

prior to erasing a block, recover valid input data from each group containing write locations in that block and re-store the recovered data as new input data.

16. The computer program as claimed in claim 15, wherein the program code further causes the computer to:

at successive stages during storage of input data in the write locations of each group, compute a transient error correction code for the input data then stored in the group.

17. The computer program as claimed in claim 16, wherein the program code further causes the computer to:

store the transient error correction code in the solid state storage in response to interruption of power to the solid state storage device.

18. The computer program as claimed in claim 15, wherein the program code further causes the computer to:

select a block for erasing in dependence on the number of write locations containing invalid data in the group or groups which contain write locations in that block.