INJECTION LOCKING BASED POWER AMPLIFIER

• US 20120274409A1
• Filed: 04/26/2011
• Published: 11/01/2012
• Est. Priority Date: 04/26/2011
• Status: Active Grant

• Current Assignee: King Abdullah University of Science and Technology
• Original Assignee: King Abdullah University of Science and Technology
• Inventors: ELDESOUKI, MUNIR, DEEN, Mohammed Jamal
• Granted Patent: US 9,099,956 B2
• Time in Patent Office: Days
• US Class Current: 331/109
• CPC Class Codes: H03B 19/12 using division only
• CPC Class Codes: H03B 5/00 Generation of oscillations using amplifier with regenerative feedback from output to input H03B9/00, H03B15/00 take precedence
• CPC Class Codes: H03B 5/1215 the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair
• CPC Class Codes: H03B 5/1228 the amplifier comprising one or more field effect transistors
• CPC Class Codes: H03B 5/1243 the means comprising voltage variable capacitance diodes
• CPC Class Codes: H03C 1/52 Modulators in which carrier or one sideband is wholly or partially suppressed H03C1/28 - H03C1/34, H03C1/46, H03C1/48 take precedence
• CPC Class Codes: H03C 2200/0058 Quadrature arrangements
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence

Abstract

A method, an apparatus and/or a system of injection locking based power amplifier is disclosed. A method includes inputting a reference signal through an injection circuit of an oscillator circuit that generates an output signal of high power that oscillates at an inherent frequency of oscillation of the oscillator circuit. The method also includes reducing a frequency of the reference signal through a differential transistor pair coupled to the injection circuit of the oscillator circuit. The method further includes locking through a tuning circuit of the oscillator circuit coupled to the differential transistor pair a frequency of the output signal to the reduced frequency of the reference signal based on the power of the reference signal to amplify the power of the reference signal through the oscillator circuit. The frequency of the reference signal is higher than the frequency of the output signal.

Claims

1. A method comprising:

inputting a reference signal through an injection circuit of an oscillator circuit that generates an output signal of high power that oscillates at an inherent frequency of oscillation of the oscillator circuit, the power of the output signal being higher than a power of the reference signal;

reducing a frequency of the reference signal through a differential transistor pair coupled to the injection circuit of the oscillator circuit; and

locking through a tuning circuit of the oscillator circuit coupled to the differential transistor pair a frequency of the output signal to the reduced frequency of the reference signal based on the power of the reference signal to amplify the power of the reference signal through the oscillator circuit, the frequency of the reference signal being higher than the frequency of the output signal.

2. The method of claim 1, further comprising:

delivering the output signal to a load coupled to an output of the oscillator circuit, wherein the power of the output signal is based on a difference between a power of the output signal and the power of the reference signal required to maintain the locking of the reduced frequency of the reference signal to the frequency of the output signal; and

operating the oscillator circuit as a power amplifier through locking the a frequency of the output signal to the reduced frequency of the reference signal to amplify the power of the reference signal, wherein the power of at least one of the reference signal and the power of the reference signal of reduced frequency is lower than the power of the output signal.

3. The method of claim 1, further comprising:

amplifying the power of the reference signal through locking the frequency of the output signal to the reduced frequency of the reference signal based on the power of the reference signal.

4. The method of claim 1, wherein locking the frequency of the output signal to the reduced frequency of the reference signal further comprising:

locking the inherent frequency of oscillation of the oscillator circuit to the reduced frequency of the reference signal;

wherein the inherent frequency of oscillation of the oscillator circuit is equivalent to the frequency of oscillation of the output signal, wherein at least one of the frequency of the output signal and the inherent frequency of oscillation of the oscillator circuit to correspond to the reduced frequency of the reference signal when the inherent frequency of oscillation of the oscillator circuit is locked to the reduced frequency of the reference signal.

5. The method of claim 1, further comprising:

reducing the power of the reference signal to lock the frequency of the output signal to the reduced frequency of the reference signal through tuning the oscillator circuit to operate at a frequency equivalent to a desired frequency of output signal.

6. The method of claim 1, further comprising:

driving the oscillator circuit based on the power of the reference signal that is lower than the power of the output signal through injection locking between the reference signal and the output signal through the oscillator circuit; and

increasing a gain of the oscillator circuit associated with amplifying the power of the reference signal through reducing a power of the reference signal to lock the frequency of the output signal to the reduced frequency of the reference signal when the power of the output signal of the oscillator circuit is high.

7. The method of claim 1, further comprising:

locking the frequency of the output signal to the reduced frequency of the reference signal when the reduced frequency of the reference signal is at least one of within the tuning range of the oscillator circuit and the reduced frequency reference signal to have a sufficient power to drive the oscillator circuit configured to operate as the power amplifier; and

increasing the frequency of operation of a circuit of a previous stage coupled to the oscillator circuit through the injection circuit of the oscillator circuit to be higher than the inherent frequency of oscillation of the oscillator circuit.

8. The method of claim 7, further comprising:

tuning the inherent frequency of oscillation of the oscillator circuit to approximately match the frequency of the output signal through a tuning circuit of the oscillator circuit to reduce the power needed to lock the frequency of the output signal to the reduced frequency of the reference signal;

configuring the oscillator circuit to have wide tuning range to allow a wider locking range to lock the frequency of the output signal to the reduced frequency of the reference signal; and

reducing a size of the circuit of the previous stage coupled to the oscillator circuit through reducing at least one of a size of the circuit components and a number of circuit components based on increasing the frequency of operation of the circuit of the previous stage of operation of the oscillator circuit.

9. The method of claim 1:

wherein the load is coupled in parallel to the tuning circuit through the output of the oscillator circuit,

wherein the frequency of the reference signal is two time that of the desired frequency of the output signal,

wherein the frequency of the reference signal is reduced by half through the differential transistor pair of the oscillator circuit,

wherein the differential transistor pair is a cross coupled negative g_m differential transistor pair,

wherein a plurality of transistors to form a cross coupled negative g_m differential pair coupled to the injection circuit of the oscillator circuit,

wherein a transconductances of the plurality of transistors forming the cross coupled negative g_m differential transistor pair are designed to overcome a loss in at least one of the tuning circuit to and the load coupled to the output circuit of the oscillator circuit,

wherein the injection locked oscillator circuit operated as the power amplifier is implemented on a standard CMOS technology, and

wherein the injection locked oscillator circuit operated as the power amplifier to have at least one of a gain of at least 31 dB and a power added efficiency of at least 36%.

10. A system comprising:

a circuit of a previous stage of operation;

an oscillator circuit coupled to a circuit of a previous stage of operation configured to generate an output signal of high power that oscillates at an inherent frequency of oscillation of the oscillator circuit, the oscillator circuit comprising;

an injection circuit of the oscillator circuit generating the output signal configured to receive a reference signal from the circuit of the previous stage as an input to the injection locked oscillator circuit, the power of the output signal being higher than a power of the reference signal;

a differential transistor pair coupled to the injection circuit of the oscillator circuit configured to reduce a frequency of the reference signal; and

a tuning circuit of the oscillator circuit coupled to the differential transistor pair configured to lock through a frequency of the output signal to the reduced frequency of the reference signal based on the power of the reference signal to amplify the power of the reference signal through the oscillator circuit, the frequency of the reference signal being higher than the frequency of the output signal.

11. The system of claim 10:

wherein an output circuit of the oscillator circuit to deliver the output signal to a load coupled to the output circuit,

wherein the power of the output signal is based on a difference between a power of the output signal and the power of the reference signal required to maintain the locking of the reduced frequency of the reference signal to the frequency of the output signal,

wherein the oscillator circuit is configured to operate as a power amplifier through locking the a frequency of the output signal to the reduced frequency of the reference signal to amplify the power of the reference signal, and

wherein the power of at least one of the reference signal and the power of the reference signal of reduced frequency is lower than the power of the output signal.

12. The system of claim 10:

wherein the power of the reference signal is amplified through locking the frequency of the output signal to the reduced frequency of the reference signal based on the power of the reference signal.

13. The system of claim 10:

wherein locking the frequency of the output signal to the reduced frequency of the reference signal to further comprise locking the inherent frequency of oscillation of the oscillator circuit to the reduced frequency of the reference signal;

wherein the inherent frequency of oscillation of the oscillator circuit is equivalent to the frequency of oscillation of the output signal, and

wherein at least one of the frequency of the output signal and the inherent frequency of oscillation of the oscillator circuit to correspond to the reduced frequency of the reference signal when the inherent frequency of oscillation of the oscillator circuit is locked to the reduced frequency of the reference signal

14. The system of claim 10:

wherein the power of the reference signal to lock the frequency of the output signal to the reduced frequency of the reference signal is reduced through tuning the oscillator circuit to operate at a frequency equivalent to a desired frequency of output signal.

15. The system of claim 13:

wherein the power of the reference signal that is lower than the power of the output signal to drive the oscillator circuit through injection locking between the reference signal and the output signal through the oscillator circuit, and

wherein a gain of the oscillator circuit associated with amplifying the power of the reference signal is increased through reducing a power of the reference signal to lock the frequency of the output signal to the reduced frequency of the reference signal when the power of the output signal of the oscillator circuit is high.

16. The system of claim 10:

wherein the frequency of the output signal is locked to the reduced frequency of the reference signal when the reduced frequency of the reference signal is at least one of within the tuning range of the oscillator circuit and the reduced frequency reference signal to have a sufficient power to drive the oscillator circuit configured to operate as the power amplifier, and

wherein the frequency of operation of a circuit of a previous stage coupled to the oscillator circuit is increased through the injection circuit of the oscillator circuit to be higher than the inherent frequency of oscillation of the oscillator circuit.

17. The system of claim 16:

wherein the inherent frequency of oscillation of the oscillator circuit is tuned to approximately match the frequency of the output signal through a tuning circuit of the oscillator circuit to reduce the power needed to lock the frequency of the output signal to the reduced frequency of the reference signal;

wherein the oscillator circuit is configured to have wide tuning range to allow a wider locking range to lock the frequency of the output signal to the reduced frequency of the reference signal; and

wherein a size of the circuit of the previous stage coupled to the oscillator circuit is reduced through reducing at least one of a size of the circuit components and a number of circuit components based on increasing the frequency of operation of the circuit of the previous stage of operation of the oscillator circuit.

18. The system of claim 10:

wherein the load is coupled in parallel to the tuning circuit through the output of the oscillator circuit,

wherein the frequency of the reference signal is two time that of the desired frequency of the output signal,

wherein the frequency of the reference signal is reduced to half the frequency of the reference signal inputted through the injection circuit,

wherein the differential transistor pair is a cross coupled negative gm differential transistor pair,

wherein a plurality of transistors to form a cross coupled negative gm differential pair coupled to the injection circuit of the oscillator circuit,

wherein a transconductances of the plurality of transistors forming the cross coupled negative gm differential transistor pair are designed to overcome a loss in at least one of the tuning circuit to and the load coupled to the output circuit of the oscillator circuit,

wherein the injection locked oscillator circuit operated as the power amplifier is implemented on a standard CMOS technology, and

wherein the injection locked oscillator circuit operated as the power amplifier to have at least one of a gain of at least 31 dB and a power added efficiency of at least 36%.

19. A method comprising:

inputting a reference signal through an injection circuit of an oscillator circuit that generates an output signal of high power that oscillates at an inherent frequency of oscillation of the oscillator circuit, the power of the output signal being higher than a power of the reference signal;

reducing a frequency of the reference signal through a differential transistor pair coupled to the injection circuit of the oscillator circuit;

locking through a tuning circuit of the oscillator circuit coupled to the differential transistor pair a frequency of the output signal to the reduced frequency of the reference signal based on the power of the reference signal to amplify the power of the reference signal through the oscillator circuit, the frequency of the reference signal being higher than the frequency of the output signal; and

delivering the output signal to a load coupled to an output of the oscillator circuit, wherein the power of the output signal is based on a difference between a power of the output signal and the power of the reference signal required to maintain the locking of the reduced frequency of the reference signal to the frequency of the output signal.

20. The method of claim 19, wherein locking the frequency of the output signal to the reduced frequency of the reference signal further comprising:

locking the inherent frequency of oscillation of the oscillator circuit to the reduced frequency of the reference signal;

wherein the inherent frequency of oscillation of the oscillator circuit is equivalent to the frequency of oscillation of the output signal, wherein at least one of the frequency of the output signal and the inherent frequency of oscillation of the oscillator circuit to correspond to the reduced frequency of the reference signal when the inherent frequency of oscillation of the oscillator circuit is locked to the reduced frequency of the reference signal.