CHANNEL IMPULSE RESPONSE (CIR)/DC OFFSET (DCO) JOINT ESTIMATION BLOCK AND METHOD
First Claim
Patent Images
1. A channel impulse response (CIR)/DC offset (DCO) joint estimation block comprising:
- an estimation CIR circuit responsive to a basic and a received midamble, each having a plurality of chips to provide an initial estimation of the CIR as a series of CIR taps;
a DC offset compensation circuit responsive to said estimated series of CIR taps to produce a DC compensated CIR;
a noise refinement circuit receiving said DC compensated CIR, filtering out the taps of a series of CIR taps below a predetermined noise level and passing the CIR estimation; and
a DC offset estimation circuit responsive to said CIR estimation to provide a DC offset estimation.
1 Assignment
0 Petitions
Accused Products
Abstract
A channel impulse response (CIR)/DC offset (DCO) joint estimation for a time division synchronous code division multiple access (TDSCDMA) system includes generating from a basic midamble and received midamble an initial estimation of the CIR as a series of CIR taps; storing the initially estimated CIR taps; calculating a DC compensated CIR from the initially estimated CIR taps; filtering out the noise from the DC compensated CIR to produce the CIR estimation; and calculating the DC offset estimation from the CIR estimation.
-
Citations
26 Claims
-
1. A channel impulse response (CIR)/DC offset (DCO) joint estimation block comprising:
-
an estimation CIR circuit responsive to a basic and a received midamble, each having a plurality of chips to provide an initial estimation of the CIR as a series of CIR taps; a DC offset compensation circuit responsive to said estimated series of CIR taps to produce a DC compensated CIR; a noise refinement circuit receiving said DC compensated CIR, filtering out the taps of a series of CIR taps below a predetermined noise level and passing the CIR estimation; and a DC offset estimation circuit responsive to said CIR estimation to provide a DC offset estimation. - View Dependent Claims (2, 3, 4)
-
-
5. A channel impulse response (CIR)/DC offset (DCO) joint estimation block comprising:
-
a processor configured to; generate from a basic midamble and received midamble an initial estimation of the CIR as a series of CIR taps; calculate a DC compensated CIR from the estimated CIR taps; filter out the noise from the said DC compensated CIR to produce the CIR estimation; and calculate a DC offset estimation from the CIR estimation. - View Dependent Claims (6, 7, 8)
-
-
9. A method of channel impulse response (CIR)/DC offset (DCO) joint estimation for a time division synchronous code division multiple access (TDSCDMA) system comprising the following steps:
-
(a) generating from a basic midamble and a received midamble an initial estimation of the CIR as a series of CIR taps; (b) storing the initially estimated CIR taps; (c) calculating a DC compensated CIR from the initially estimated CIR taps; (d) filtering out the noise from the said DC compensated CIR to produce the CIR estimation; and (e) calculating a DC offset estimation from the CIR estimation. - View Dependent Claims (10, 11, 12, 13, 14, 15)
-
-
16. A TDSCDMA receiver including a channel impulse response (CIR)/DC offset (DCO) joint estimation block comprising:
-
an interface to collect midamble rmid; an initial estimation CIR circuit responsive to a basic midamble rmid and a received midamble m, each having a plurality of chips to provide an initial estimation of the CIR as a series of CIR taps {tilde over (h)}; a buffer for storing said initially estimated series of CIR taps {tilde over (h)}; a DC offset compensation circuit responsive to said initially estimated series of CIR taps to produce a DC compensated CIR h (i);a noise refinement circuit receiving said DC compensated CIR h (i) for filtering out the taps of a series of CIR taps below a predetermined noise level and passing the CIR estimation ĥ
; anda DC offset estimation circuit responsive to said CIR estimation to provide a DC offset estimation {circumflex over (D)}. - View Dependent Claims (17, 18, 19, 20, 21)
-
-
22. A time division synchronous code division multiple access (TDSCDMA) receiver comprising a channel impulse response (CIR)/DC offset (DCO) joint estimation block comprising:
-
a processor configured to; generate from a basic midamble and a received midamble an initial estimation of the CIR as a series of CIR taps; store the initially estimated CIR taps; calculate a DC compensated CIR from the initially estimated CIR taps; filter out the noise from the said DC compensated CIR to produce the CIR estimation; calculate the DC offset estimation from the CIR estimation; and an iterative feedback loop connected from said DC offset estimation circuit to said DC offset compensation circuit for updating the compensation of said compensated CIR and improving the accuracy of said CIR estimation and said DC offset estimation. - View Dependent Claims (23, 24, 25, 26)
-
Specification