RING OSCILLATOR BASED DESIGN-FOR-TRUST

• US 20120278893A1
• Filed: 03/23/2012
• Published: 11/01/2012
• Est. Priority Date: 03/23/2011
• Status: Active Grant

• Current Assignee: Polytechnic Institute Of New York University (New York University)
• Original Assignee: Polytechnic Institute Of New York University (New York University)
• Inventors: Karri, Ramesh, Jyothi, Vinayaka, Rajendran, Jeyavijayan, Sinanoglu, Ozgur
• Granted Patent: US 9,081,991 B2
• Time in Patent Office: Days
• US Class Current: 726/24
• CPC Class Codes: G06F 21/56 Computer malware detection or handling, e.g. anti-virus arrangements
• CPC Class Codes: G06F 21/566 Dynamic detection, i.e. detection performed at run-time, e.g. emulation, suspicious activities
• CPC Class Codes: G06F 21/71 to assure secure computing or processing of information

Abstract

A ring oscillator (RO) based Design-For-Trust (DFTr) technique is described. Functional paths of integrated circuit (IC) are included in one or more embedded ROs by (1) selecting a path in the IC, based on path selection criteria, that has one or more unsecured gates, and (2) embedding one or more ROs on the IC until a stop condition is met. An input pattern to activate embedded RO is determined. Further, a golden frequency which is a frequency at which the embedded RO oscillates, and a frequency range of the embedded RO are determined. A Trojan in the IC may be detected by activating the embedded RO (by applying the input pattern), measuring a frequency at which the embedded RO oscillates, and determining whether or not a Trojan is present based on whether or not the measured frequency of the RO is within a predetermined operating frequency range of the RO.

Claims

1. A computer-implemented method for enabling detection of a Trojan in an integrated circuit (IC), the computer-implemented method comprising:

a) selecting a path in the IC based on a path selection criteria, wherein the path has one or more unsecured gates;

b) embedding a ring oscillator on the IC to secure the one or more unsecured gates in the selected path;

c) determining an input pattern to be provided to the IC, to activate the embedded ring oscillator;

d) repeating acts (a)-(c) until a stop condition is met; and

e) determining a golden frequency of each of one or more of the embedded ring oscillators, wherein the golden frequency is a frequency at which the embedded ring oscillator oscillates without a presence of the Trojan.

2. The computer-implemented method of claim 1 further comprising:

f) determining an operating frequency range of each of the one or more ring oscillators as a function of the golden frequency of the ring oscillator and a frequency variation of the ring oscillator due to process variations in fabrication of the IC.

3. The computer-implemented method of claim 2 further comprising:

g) activating the ring oscillator by applying the input pattern to the IC;

h) measuring a frequency of the ring oscillator;

i) determining whether the measured frequency of the ring oscillator is in the operating frequency range of the ring oscillator; and

j) responsive to a determination that the measured frequency of the ring oscillator is not in the operating frequency range of the ring oscillator, outputting an indication that the IC has a Trojan.

4. The computer-implemented method of claim 3 further comprising:

k) responsive to a determination that the measured frequency of the ring oscillator is in the operating frequency range of the ring oscillator, measuring a power consumed by the IC when the ring oscillator is activated;

l) determining whether the power consumed by the IC is within a predetermined power consumption range; and

m) responsive to a determination that the power consumed by the IC is not within the predetermined power consumption range, outputting an indication that the IC has a Trojan.

5. The computer-implemented method of claim 3, wherein activating the ring oscillator includes activating a plurality of ring oscillators simultaneously.

6. The computer-implemented method of claim 1, wherein the path selection criteria is at least one of (1) a path that has a maximum number of unsecured gates from among a set of candidate paths, (2) a path with longest delay from among a set of candidate paths, (3) a path that has a predetermined type of gates, or (4) a path that is defined as a critical path in the IC.

7. The computer-implemented method of claim 6, wherein the path selection criteria is subject to a constraint wherein a predetermined number of gates is chosen such that a change in frequency of the ring oscillator due to process variation is less than a change in frequency of the embedded ring oscillator due to the presence of a Trojan.

8. The computer-implemented method of claim 1, wherein the stop condition is at least one of (1) all gates in the IC are secured, (2) a predetermined number of gates in the IC are secured, (3) a predetermined number of ring oscillators are embedded, (4) a predetermined number of gates per ring oscillator are secured, or (5) a predetermined number of gates in a path are secured.

9. The computer-implemented method of claim 1, wherein the path originates from a primary input of the IC or a pseudo-primary input of the IC.

10. The computer-implemented method of claim 1, wherein the path terminates at a primary output of the IC or a pseudo-primary output of the IC.

11. The computer-implemented method of claim 1, wherein the path is a functional path of the IC.

12. The computer-implemented method of claim 1, wherein the Trojan is at least one of (1) a system level Trojan embedded in the IC, (2) a register-transfer level Trojan, (3) a gate level Trojan, (4) a transistor level Trojan, or (5) a physical level Trojan.

13. The computer-implemented method of claim 1, wherein the act of embedding one or more ring oscillators in the IC includes embedding one or more selector components to activate at least one ring oscillator from the one or more of embedded ring oscillators.

14. The computer-implemented method of claim 13, wherein the one or more selector components are multiplexers.

15. The computer-implemented method of claim 1, wherein the golden frequency of the ring oscillator is determined based, at least in part, on simulation results in an application-specific integrated circuit (ASIC).

16. The computer-implemented method of claim 1, wherein the golden frequency of the ring oscillator is determined based, at least in part, on implementation results in a field-programmable gate array (FPGA) IC.

17. The computer-implemented method of claim 2, wherein the golden frequency of the ring oscillator and the operating frequency range of the ring oscillator are determined at one or more voltage levels.

18. The computer-implemented method of claim 3, wherein the frequency of the ring oscillator is measured at one or more voltage levels.

19. Apparatus comprising:

at least one processor;

at least one input device; and

at least one storage device storing program instructions which, when executed by the at least one processor, performs a method for enabling detection of a Trojan in an integrated circuit (IC), the method including;

a) selecting a path in the IC based on a path selection criteria, wherein the path has one or more unsecured gates;

b) embedding a ring oscillator on the IC to secure the one or more unsecured gates in the selected path;

c) determining an input pattern to be provided to the IC, to activate the embedded ring oscillator;

d) repeating acts (a)-(c) until a stop condition is met; and

e) determining a golden frequency of each of one or more of the embedded ring oscillators, wherein the golden frequency is a frequency at which the embedded ring oscillator oscillates without a presence of the Trojan.

20. The apparatus of claim 19 further comprising:

f) determining an operating frequency range of each of the one or more ring oscillators as a function of the golden frequency of the ring oscillator and a frequency variation of the ring oscillator due to process variations in fabrication of the IC.

21. The apparatus of claim 20, wherein the program instructions which, when executed by the at least one processor, performs the method further comprising:

g) activating the ring oscillator by applying the input pattern to the IC;

h) measuring a frequency of the ring oscillator;

i) determining whether the measured frequency of the ring oscillator is in the operating frequency range of the ring oscillator; and

j) responsive to a determination that the measured frequency of the ring oscillator is not in the operating frequency range of the ring oscillator, outputting an indication that the IC has a Trojan.

22. The apparatus of claim 21, wherein the program instructions which, when executed by the at least one processor, performs the method further comprising:

k) responsive to a determination that the measured frequency of the ring oscillator is in the operating frequency range of the ring oscillator, measuring a power consumed by the IC when the ring oscillator is activated;

l) determining whether the power consumed by the IC is within a predetermined power consumption range; and

m) responsive to a determination that the power consumed by the IC is not within the predetermined power consumption range, outputting an indication that the IC has a Trojan.

23. The apparatus of claim 21, wherein activating the ring oscillator includes activating a plurality of ring oscillators simultaneously.

24. The apparatus of claim 19, wherein the path selection criteria is at least one of (1) a path that has a maximum number of unsecured gates from among a set of candidate paths, (2) a path with longest delay from among a set of candidate paths, (3) a path that has a predetermined type of gates, or (4) a path that is defined as a critical path in the IC.

25. The apparatus method of claim 24, wherein the path selection criteria is subject to a constraint wherein a predetermined number of gates is chosen such that a change in frequency of the ring oscillator due to process variation is less than a change in frequency of the embedded ring oscillator due to the presence of a Trojan.

26. The apparatus of claim 19, wherein the stop condition is at least one of (1) all gates in the IC are secured, (2) a predetermined number of gates in the IC are secured, (3) a predetermined number of ring oscillators are embedded, (4) a predetermined number of gates per ring oscillator are secured, or (5) a predetermined number of gates in a path are secured.

27. The apparatus of claim 19, wherein the path originates from a primary input of the IC or a pseudo-primary input of the IC.

28. The apparatus of claim 19, wherein the path terminates at a primary output of the IC or a pseudo-primary output of the IC.

29. The apparatus of claim 19, wherein the path is a functional path of the IC.

30. The apparatus of claim 19, wherein the Trojan is at least one of (1) a system level Trojan embedded in the IC, (2) a register-transfer level Trojan, (3) a gate level Trojan, (4) a transistor level Trojan, or (5) a physical level Trojan.

31. The apparatus of claim 19, wherein the act of embedding one or more ring oscillators in the IC includes embedding one or more selector components to activate at least one ring oscillator from the one or more of embedded ring oscillators.

32. The apparatus of claim 31, wherein the one or more selector components are multiplexers.

33. The apparatus of claim 19, wherein the golden frequency of the ring oscillator is determined based, at least in part, on simulation results in an application-specific integrated circuit (ASIC).

34. The apparatus of claim 19, wherein the golden frequency of the ring oscillator is determined based, at least in part, on implementation results in a field-programmable gate array (FPGA).

35. The apparatus of claim 20, wherein the golden frequency of the ring oscillator and the operating frequency range of the ring oscillator are determined at one or more voltage levels.

36. The apparatus of claim 21, wherein the frequency of the ring oscillator is measured at one or more voltage levels.