TRENCH MOS STRUCTURE AND METHOD FOR MAKING THE SAME

• US 20120286352A1
• Filed: 05/10/2011
• Published: 11/15/2012
• Est. Priority Date: 05/10/2011
• Status: Active Grant

• Current Assignee: Nanya Technology Corporation
• Original Assignee: Nanya Technology Corporation
• Inventors: Chen, Yi-Nan, Liu, Hsien-Wen, Kuo, Chin-Te
• Granted Patent: US 8,692,318 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A trench MOS structure is provided. The trench MOS structure includes a substrate, an epitaxial layer, a trench, a gate isolation, a trench gate, a guard ring and a reinforcement structure within the guard ring. The substrate has a first conductivity type, a first side and a second side opposite to the first side. The epitaxial layer has the first conductivity type and is disposed on the first side. The trench is disposed in the epitaxial layer. The gate isolation covers the inner wall of the trench. The trench gate is disposed in the trench and has the first conductivity type. The guard ring has a second conductivity type and is disposed within the epitaxial layer. The reinforcement structure has an electrically insulating material and is disposed within the guard ring.

Claims

1. A trench MOS structure, comprising:

a substrate of a first conductivity type and having a first side and a second side opposite to said first side;

an epitaxial layer of said first conductivity type disposed on said first side;

a trench disposed in said epitaxial layer;

a gate isolation covering an inner wall of said trench;

a trench gate disposed in said trench, of said first conductivity type, and of a first depth;

a source of said first conductivity type, disposed within said epitaxial layer and adjacent to said gate;

a guard ring of a second conductivity type disposed within said epitaxial layer and adjacent to said source;

a reinforcement structure of a second depth having an electrically insulating material and disposed within said guard ring; and

a drain disposed on said second side.

2. The trench MOS structure of claim 1, wherein said first conductivity type is N type.

3. The trench MOS structure of claim 1, wherein said first conductivity type is P type.

4. The trench MOS structure of claim 1, wherein said gate isolation and said electrically insulating material comprises oxide.

5. The trench MOS structure of claim 1, wherein said trench gate comprises poly-silicon of said first conductivity type.

6. The trench MOS structure of claim 1, wherein said second depth is greater than said first depth.

7. The trench MOS structure of claim 1, wherein said source is adjacent to said guard ring.

8. The trench MOS structure of claim 1, wherein said reinforcement structure comprises:

a reinforcement trench disposed in said epitaxial layer;

a reinforcement isolation of said electrically insulating material and covering an inner wall of said reinforcement trench; and

a reinforcement material filling said reinforcement trench.

9. The trench MOS structure of claim 8, wherein said trench gate has said reinforcement material.

10. The trench MOS structure of claim 8, wherein said reinforcement material is air.

11. A method for forming a trench MOS structure, comprising:

providing a substrate and an epitaxial layer, wherein said substrate has a first conductivity type, a first side and a second side opposite to said first side, and said epitaxial layer of said first conductivity type is disposed on said first side;

performing an implantation step to form at least one region of a second conductivity type disposed within said epitaxial layer to form a guard ring;

performing an etching step to form a gate trench of a first depth and a reinforcement trench of a second depth, wherein said gate trench and said reinforcement trench are disposed in said epitaxial layer;

performing an oxidizing step to form a gate isolation covering an inner wall of said gate trench and to form a reinforcement isolation covering an inner wall of said reinforcement trench; and

filling said gate trench and said reinforcement trench with a material of said first conductivity type so that said reinforcement trench becomes a reinforcement structure disposed within said guard ring.

12. The method for forming a trench MOS structure of claim 11, wherein said first conductivity type is N type.

13. The method for forming a trench MOS structure of claim 11, wherein said first conductivity type is P type.

14. The method for forming a trench MOS structure of claim 11, wherein said implantation step is performed before said etching step.

15. The method for forming a trench MOS structure of claim 11, wherein said implantation step is performed after said etching step.

16. The method for forming a trench MOS structure of claim 11, wherein an opening of said gate trench is larger than that of said reinforcement trench.

17. The method for forming a trench MOS structure of claim 11, wherein said second depth is greater than said first depth.

18. The method for forming a trench MOS structure of claim 11, wherein said material completely fills up said gate trench and said reinforcement trench.

19. The method for forming a trench MOS structure of claim 11, wherein said material seals said reinforcement trench to form an air gap.