FABRICATION OF TRENCH DMOS DEVICE HAVING THICK BOTTOM SHIELDING OXIDE

• US 20120292693A1
• Filed: 07/27/2012
• Published: 11/22/2012
• Est. Priority Date: 08/31/2009
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Inc. (Alpha & Omega Semiconductor, Ltd.)
• Original Assignee: Alpha & Omega Semiconductor, Inc. (Alpha & Omega Semiconductor, Ltd.)
• Inventors: LEE, Yeeheng, TAI, Sung-Shan, CHANG, Hong, CHEN, John
• Granted Patent: US 9,000,514 B2
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/66719 With a step of forming an insulating sidewall spacer
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

Semiconductor device fabrication method and devices are disclosed. A device may be fabricated by forming in a semiconductor layer; filling the trench with an insulating material; removing selected portions of the insulating material leaving a portion of the insulating material in a bottom portion of the trench; forming one or more spacers on one or more sidewalls of a remaining portion of the trench; anisotropically etching the insulating material in the bottom portion of the trench using the spacers as a mask to form a trench in the insulator; removing the spacers; and filling the trench in the insulator with a conductive material. Alternatively, an oxide-nitride-oxide (ONO) structure may be formed on a sidewall and at a bottom of the trench and one or more conductive structures may be formed in a portion of the trench not occupied by the ONO structure.

Claims

1. A semiconductor device comprising:

a semiconductor layer;

a trench formed in the semiconductor layer;

a conductive structure formed in the trench, the conductive structure having a top portion and a bottom portion electrically insulated from semiconductor layer by a first insulating layer and a second insulating layer respectively, wherein the top portion is wider than the bottom portion and wherein a thickness of the second insulating layer proximate sidewalls of the trench is T1 and a thickness of the second insulating layer proximate a bottom of the trench is T2 that is different from T1.

2. The semiconductor device of claim 1 wherein T1 is less than T2.

3. The semiconductor device of claim 2 further comprising an insulating material that fills a gap formed in the top portion of the conductive structure.

4. The semiconductor device of claim 2 wherein the second insulating layers comprise first and second oxide layers, the device further comprising a nitride layer sandwiched between the first and second oxide layers whereby the second oxide layer, the nitride layer and the first oxide layer form an oxide-nitride-oxide structure.

5. The semiconductor device of claim 4, wherein a thickness of the nitride layer is between 50 Angstroms and 500 Angstroms.

6. The semiconductor device of claim 4 wherein the first and second portions of the conductive structure are electrically insulated from each other by a reoxidation layer.

7. The semiconductor device of claim 6 wherein a thickness of the reoxidation layer is about 3000 Angstroms.

8. The semiconductor of claim 7, wherein the first and second portions of the conductive structure comprises polysilicon.

9. The semiconductor device of claim 1 wherein the semiconductor layer includes a lightly doped layer overlaying a heavily doped layer, wherein the trench formed in the semiconductor layer extends through the lightly doped layer into the heavily doped layer.