SEMICONDUCTOR DEVICE

• US 20120293201A1
• Filed: 05/11/2012
• Published: 11/22/2012
• Est. Priority Date: 05/20/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Fujita, Masashi, Shionoiri, Yutaka, Kato, Kiyoshi, Kobayashi, Hidetomo
• Granted Patent: US 9,762,246 B2
• Time in Patent Office: Days
• US Class Current: 326/38
• CPC Class Codes: H03K 19/1737 using multiplexers H03K19/1738 takes precedence
• CPC Class Codes: H03K 19/17728 Reconfigurable logic blocks, e.g. lookup tables
• CPC Class Codes: H03K 19/17758 for speeding up configuration or reconfiguration
• CPC Class Codes: H03K 19/17772 for powering on or off

Abstract

An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.

Claims

1. A semiconductor device comprising:

a plurality of operation circuits;

a selector circuit; and

a storage circuit including a first transistor,

wherein the storage circuit inputs data to the selector circuit through the first transistor,

wherein the selector circuit selects at least one of operation results of the plurality of operation circuits in accordance with the data, and

wherein a channel formation region of the first transistor comprises an oxide semiconductor.

2. The semiconductor device according to claim 1,

wherein the storage circuit further comprises a capacitor, and

wherein the data is input to the capacitor through the first transistor.

3. The semiconductor device according to claim 1,

wherein the selector circuit includes a second transistor, a third transistor, and an inverter,

wherein the storage circuit inputs the data to a gate of the second transistor, and inputs the data to a gate of the third transistor through the inverter,

wherein the second transistor selects one of the operation results of the plurality of operation circuits, and

wherein the third transistor selects another one of the operation results of the plurality of operation circuits.

4. The semiconductor device according to claim 3, wherein a channel formation region of the second transistor and a channel formation region of the third transistor comprise single crystal silicon.

5. A semiconductor device comprising:

an arithmetic logic unit including a selector circuit and a plurality of operation circuits; and

a storage circuit including a first transistor,

wherein the storage circuit inputs data to the selector circuit through the first transistor,

wherein the selector circuit selects at least one of operation results of the plurality of operation circuits in accordance with the data, and

wherein a channel formation region of the first transistor comprises an oxide semiconductor.

6. The semiconductor device according to claim 5,

wherein the storage circuit further comprises a capacitor, and

wherein the data is input to the capacitor through the first transistor.

7. The semiconductor device according to claim 5,

wherein the selector circuit includes a second transistor, a third transistor, and an inverter,

wherein the storage circuit inputs the data to a gate of the second transistor, and inputs the data to a gate of the third transistor through the inverter,

wherein the second transistor selects one of the operation results of the plurality of operation circuits, and

wherein the third transistor selects another one of the operation results of the plurality of operation circuits.

8. The semiconductor device according to claim 7, wherein a channel formation region of the second transistor and a channel formation region of the third transistor comprise single crystal silicon.

9. A semiconductor device comprising:

a plurality of logic circuit units each including a plurality of operation circuits and a selector circuit;

a first storage circuit including a first transistor; and

a connector unit including a second transistor and a second storage circuit, the second storage circuit including a third transistor,

wherein the first storage circuit inputs first data to the selector circuit through the first transistor,

wherein the selector circuit selects at least one of operation results of the plurality of operation circuits in accordance with the first data,

wherein one of a source and a drain of the second transistor is electrically connected to one of the plurality of logic circuit units,

wherein the other of the source and the drain of the second transistor is electrically connected to another one of the plurality of logic circuit units,

wherein the second storage circuit inputs second data to a gate of the second transistor through the third transistor,

wherein the second transistor controls electrical connection between the one and the another one of the plurality of logic circuit units in accordance with the second data, and

wherein a channel formation region of each of the first transistor and the third transistor comprises an oxide semiconductor.

10. The semiconductor device according to claim 9,

wherein the first storage circuit includes a first capacitor,

wherein the second storage circuit includes a second capacitor,

wherein the first data is input to the first capacitor, and

wherein the second dada is input to the second capacitor.

11. The semiconductor device according to claim 9,

wherein the selector circuit includes a fourth transistor, a fifth transistor, and an inverter,

wherein the first storage circuit inputs the first data to a gate of the fourth transistor, and inputs the first data to a gate of the fifth transistor through the inverter,

wherein the fourth transistor selects one of the operation results of the plurality of operation circuits, and

wherein the fifth transistor selects another one of the operation results of the plurality of operation circuits.

12. The semiconductor device according to claim 11, wherein a channel formation region of the fourth transistor and a channel formation region of the fifth transistor comprise single crystal silicon.

13. A semiconductor device comprising:

a plurality of arithmetic logic units;

a first storage circuit; and

a connector unit,

wherein each of the plurality of arithmetic logic units includes a selector circuit and a plurality of operation circuits,

wherein the first storage circuit includes a first transistor,

wherein the connector unit includes a second transistor and a second storage circuit,

wherein the second storage circuit includes a third transistor,

wherein the first storage circuit inputs first data to the selector circuit through the first transistor,

wherein the selector circuit selects at least one of operation results of the plurality of operation circuits in accordance with the first data,

wherein one of a source and a drain of the second transistor is electrically connected to one of the plurality of logic circuit units,

wherein the other of the source and the drain of the second transistor is electrically connected to another one of the plurality of logic circuit units,

wherein the second storage circuit inputs second data to a gate of the second transistor through the third transistor,

wherein the second transistor controls electrical connection between the one and the another one of the plurality of logic circuit units in accordance with the second data, and

wherein a channel formation region of each of the first transistor and the third transistor comprises an oxide semiconductor.

14. The semiconductor device according to claim 13,

wherein the first storage circuit includes a first capacitor,

wherein the second storage circuit includes a second capacitor,

wherein the first data is input to the first capacitor, and

wherein the second dada is input to the second capacitor.

15. The semiconductor device according to claim 13,

wherein the selector circuit includes a fourth transistor, a fifth transistor, and an inverter,

wherein the first storage circuit inputs the first data to a gate of the fourth transistor, and inputs the first data to a gate of the fifth transistor through the inverter,

wherein the fourth transistor selects one of the operation results of the plurality of operation circuits, and

wherein the fifth transistor selects another one of the operation results of the plurality of operation circuits.

16. The semiconductor device according to claim 15, wherein a channel formation region of the fourth transistor and a channel formation region of the fifth transistor comprise single crystal silicon.